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70V261S35PFG PDF预览

70V261S35PFG

更新时间: 2024-02-03 08:27:22
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
17页 338K
描述
HIGH-SPEED 3.3V 16K x 16 DUAL-PORT STATIC RAM

70V261S35PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TQFP
包装说明:LFQFP, QFP100,.63SQ,20针数:100
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.24
Samacsys Description:TQFP 14.0 X 14.0 X 1.4 MM最长访问时间:35 ns
I/O 类型:COMMONJESD-30 代码:S-PQFP-G100
JESD-609代码:e3长度:14 mm
内存密度:262144 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端口数量:2
端子数量:100字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:1.6 mm
最大待机电流:0.006 A最小待机电流:3 V
子类别:SRAMs最大压摆率:0.14 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:14 mm
Base Number Matches:1

70V261S35PFG 数据手册

 浏览型号70V261S35PFG的Datasheet PDF文件第3页浏览型号70V261S35PFG的Datasheet PDF文件第4页浏览型号70V261S35PFG的Datasheet PDF文件第5页浏览型号70V261S35PFG的Datasheet PDF文件第7页浏览型号70V261S35PFG的Datasheet PDF文件第8页浏览型号70V261S35PFG的Datasheet PDF文件第9页 
IDT70V261S/L  
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt  
Industrial and Commercial Temperature Ranges  
3.3V  
3.3V  
AC Test Conditions  
Input Pulse Levels  
GND to 3.0V  
3ns Max.  
1.5V  
590  
590Ω  
Input Rise/Fall Times  
Input Timing Reference Levels  
Output Reference Levels  
Output Load  
DATAOUT  
BUSY  
INT  
DATAOUT  
1.5V  
30pF  
5pF*  
435Ω  
435Ω  
Figures 1 and 2  
3040 tbl 10  
3040 drw 04  
3040 drw 03  
Figure 1. AC Output Test Load  
Figure 2. Output Test Load  
(for tLZ, tHZ, tWZ, tOW)  
* Including scope and jig.  
Timing of Power-Up Power-Down  
CE  
tPU  
tPD  
I
CC  
SB  
I
,
3040 drw 05  
AC Electrical Characteristics Over the  
OperatingTemperatureandSupplyVoltageRange(4)  
70V261X25  
70V261X55  
Com'l Only  
70V261X35  
Com'l Only  
Com'l  
& Ind  
Symbol  
Parameter  
Min.  
Max.  
Min.  
Max.  
Min.  
Max.  
Unit  
READ CYCLE  
____  
____  
____  
t
RC  
AA  
ACE  
ABE  
AOE  
OH  
LZ  
HZ  
PU  
PD  
SOP  
SAA  
Read Cycle Time  
25  
35  
55  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
____  
____  
____  
t
Address Access Time  
25  
25  
25  
35  
35  
35  
55  
55  
55  
Chip Enable Access Time(3)  
____  
____  
____  
____  
____  
____  
____  
____  
____  
t
t
Byte Enable Access Time(3)  
t
Output Enable Access Time  
15  
20  
30  
____  
____  
____  
t
Output Hold from Address Change  
Output Low-Z Time(1,2)  
3
3
3
____  
____  
____  
t
3
3
3
Output High-Z Time(1,2)  
15  
20  
25  
____  
____  
____  
t
t
Chip Enable to Power Up Time(2)  
Chip Disable to Power Down Time(2)  
Semaphore Flag Update Pulse (OE or SEM)  
Semaphore Address Access Time  
0
0
0
____  
____  
____  
____  
____  
____  
t
25  
35  
50  
____  
____  
____  
t
15  
15  
15  
____  
____  
____  
t
35  
45  
65  
ns  
3040 tbl 11  
NOTES:  
1. Transition is measured 0mV from Low- or High-impedance voltage with Output Test Load (Figure 2).  
2. This parameter is guaranteed by device characterization, but is not production tested.  
3. To access RAM, CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL.  
4. 'X' in part number indicates power rating (S or L).  
6.642  

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