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7015S25JGB PDF预览

7015S25JGB

更新时间: 2024-09-15 18:20:47
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
20页 178K
描述
Dual-Port SRAM, 8KX9, 25ns, CMOS, PQCC68, 0.95 X 0.95 INCH, 0.17 INCH HEIGHT, GREEN, PLASTIC, LCC-68

7015S25JGB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ, LDCC68,1.0SQ针数:68
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.77
最长访问时间:25 ns其他特性:INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN
I/O 类型:COMMONJESD-30 代码:S-PQCC-J68
JESD-609代码:e3长度:24.2062 mm
内存密度:73728 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:9湿度敏感等级:1
功能数量:1端口数量:2
端子数量:68字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX9输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC68,1.0SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:4.57 mm最大待机电流:0.03 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.34 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn) - annealed
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:24.2062 mmBase Number Matches:1

7015S25JGB 数据手册

 浏览型号7015S25JGB的Datasheet PDF文件第2页浏览型号7015S25JGB的Datasheet PDF文件第3页浏览型号7015S25JGB的Datasheet PDF文件第4页浏览型号7015S25JGB的Datasheet PDF文件第5页浏览型号7015S25JGB的Datasheet PDF文件第6页浏览型号7015S25JGB的Datasheet PDF文件第7页 
IDT7015S/L  
HIGH-SPEED  
8K x 9 DUAL-PORT  
STATIC RAM  
Features:  
M/S = VIH for BUSY output flag on Master  
M/S = VIL for BUSY input on Slave  
Busy and Interrupt Flag  
On-chip port arbitration logic  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80-  
pin TQFP  
Industrial temperature range (–40°C to +85°C) is available  
for selected speeds  
True Dual-Ported memory cells which allow simultaneous  
reads of the same memory location  
High-speed access  
– Commercial:12/15/17/20/25/35ns(max.)  
Industrial:20ns (max.)  
Military:20/25/35ns(max.)  
Low-power operation  
IDT7015S  
Active:750mW(typ.)  
Standby: 5mW (typ.)  
IDT7015L  
Active:750mW(typ.)  
Standby: 1mW (typ.)  
Green parts available, see ordering information  
IDT7015 easily expands data bus width to 18 bits or more  
using the Master/Slave select when cascading more than  
one device  
FunctionalBlockDiagram  
OEL  
OER  
CER  
CEL  
R/WR  
R/W  
L
I/O0L- I/O8L  
I/O0R-I/O8R  
I/O  
I/O  
Control  
Control  
BUSYL(1,2)  
(1,2)  
BUSY  
R
A
12L  
A
12R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
A
0L  
13  
13  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE  
OE  
R/W  
L
CE  
OE  
R/W  
R
R
L
R
L
SEM  
R
SEM  
L
M/S  
(2)  
(2)  
INTL  
INTR  
2954 drw 01  
NOTES:  
1. In MASTER mode: BUSY is an output and is a push-pull driver  
In SLAVE mode: BUSY is input.  
2. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.  
OCTOBER 2008  
1
DSC 2954/8  
©2008IntegratedDeviceTechnology,Inc.  

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