Datasheet > 7015S25PFGB

7015S25PFGB

更新时间： 2024-09-17 08:17:35

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
21页	308K
描述
Dual-Port SRAM, 8KX9, 25ns, CMOS, PQFP80, 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80

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中文翻译

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数据手册

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7015S25PFGB 数据手册

IDT7015S/L

HIGH-SPEED

8K x 9 DUAL-PORT

STATIC RAM

Features:

◆

M/S = VIH for BUSY output flag on Master

M/S = VIL for BUSY input on Slave

Busy and Interrupt Flag

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

TTL-compatible, single 5V (±10%) power supply

Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80-

pin TQFP

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

True Dual-Ported memory cells which allow simultaneous

reads of the same memory location

High-speed access

◆

– Commercial:12/15/17/20/25/35ns(max.)

– Industrial: 20ns (max.)

– Military:20/25/35ns(max.)

Low-power operation

◆

– IDT7015S

Active:750mW(typ.)

Standby: 5mW (typ.)

– IDT7015L

◆

Active:750mW(typ.)

Standby: 1mW (typ.)

Green parts available, see ordering information

◆

IDT7015 easily expands data bus width to 18 bits or more

using the Master/Slave select when cascading more than

one device

FunctionalBlockDiagram

OEL

OER

CER

CEL

R/WR

R/W

I/O0L- I/O8L

I/O0R-I/O8R

I/O

Control

BUSY_L^(1,2)

(1,2)

BUSY

12L

12R

Address

Decoder

MEMORY

ARRAY

Address

Decoder

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

R/W

SEM

M/S

(2)

INTL

INTR

2954 drw 01

NOTES:

1. In MASTER mode: BUSY is an output and is a push-pull driver

In SLAVE mode: BUSY is input.

2. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.

AUGUST2014

DSC 2954/9

12 3 4 5 6 7...21

中文翻译

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7015S35JG8	IDT	获取价格	Dual-Port SRAM, 8KX9, 35ns, CMOS, PQCC68, PLASTIC, LCC-68
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