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XR16V2651 PDF预览

XR16V2651

更新时间: 2024-11-22 04:23:31
品牌 Logo 应用领域
艾科嘉 - EXAR 先进先出芯片
页数 文件大小 规格书
51页 1045K
描述
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE

XR16V2651 数据手册

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PRELIMINARY  
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE  
XR16V2651  
JUNE 2006  
REV. P1.0.0  
FEATURES  
GENERAL DESCRIPTION  
2.25 to 3.6 Volt Operation  
5 Volt Tolerant Inputs  
1
The XR16V2651 (V2651) is a high performance dual  
universal asynchronous receiver and transmitter  
(UART) with 32 byte TX and RX FIFOs. The device  
operates from 2.25 to 3.6 volts with 5 Volt tolerant  
inputs and is pin-to-pin and software compatible to  
Exar’s XR16V2551 and XR16L2551. The device  
Pin-to-pin compatible to Exar’s XR16L2751 in the  
48-TQFP package  
Two independent UART channels  
Register set identical to 16V2650  
includes  
2
additional capabilities over the  
XR16V2650: Intel and Motorola data bus selection  
and a “PowerSave” mode to further reduce sleep  
current to a minimum during sleep mode. It supports  
the Exar’s enhanced features of selectable FIFO  
trigger level, automatic hardware (RTS/CTS) and  
software flow control, and a complete modem  
interface. An internal loopback capability allows  
system diagnostics. Independent programmable  
fractional baud rate generators are provided in each  
channel to select data rates up to 16 Mbps at 3.3 Volt  
and 4X sampling clock. The V2651 is available in 48-  
pin TQFP and 32-pin QFN packages.  
Data rate of up to 16 Mbps at 3.3 V, and 12.5  
Mbps at 2.5 V with 4X sampling rate  
Fractional Baud Rate Generator  
Transmit and Receive FIFOs of 32 bytes  
Selectable TX and RX FIFO Trigger Levels  
Automatic Hardware (RTS/CTS) Flow Control  
Automatic Software (Xon/Xoff) Flow Control  
Wireless Infrared (IrDA 1.0) Encoder/Decoder  
Automatic sleep mode with wake-up interrupt  
Full modem interface  
NOTE: 1 Covered by U.S. Patent #5,649,122  
PowerSave Feature reduces sleep current to 15 µA  
Device Identification and Revision  
APPLICATIONS  
Portable Appliances  
Crystal oscillator (up to 32MHz) or external clock  
(up to 64MHz) input  
Telecommunication Network Routers  
Ethernet Network Routers  
48-TQFP and 32-QFN packages  
Cellular Data Devices  
Factory Automation and Process Controls  
FIGURE 1. XR16V2651 BLOCK DIAGRAM  
*5 Volt Tolerant Inputs  
2.25 to 3.6V VCC  
GND  
PwrSave  
A2:A0  
D7:D0  
UART Channel A  
32 Byte TX FIFO  
IOR# (VCC)  
IOW# (R/W#)  
CSA# (CS#)  
TXA, RXA, DTRA#,  
DSRA#, RTSA#,  
DTSA#, CDA#, RIA#,  
OP2A#  
UART  
Regs  
IR  
ENDEC  
TX & RX  
CSB# (A3)  
BRG  
INTA (IRQ#)  
32 Byte RX FIFO  
INTB (logic 0)  
TXB, RXB, DTRB#,  
DSRB#, RTSB#,  
CTSB#, CDB#, RIB#,  
OP2B#  
TXRDYA#  
TXRDYB#  
RXRDYA#  
RXRDYB#  
UART Channel B  
(same as Channel A)  
Intel or  
Motorola  
Data Bus  
Interface  
XTAL1  
XTAL2  
Reset (Reset#)  
16/68#  
Crystal Osc/Buffer  
CLKSEL  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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