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XR16V554DIV PDF预览

XR16V554DIV

更新时间: 2024-11-22 04:23:31
品牌 Logo 应用领域
艾科嘉 - EXAR 先进先出芯片
页数 文件大小 规格书
45页 911K
描述
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO

XR16V554DIV 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP, QFP64,.47SQ,20针数:64
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.72其他特性:ALSO OPERATES AT 2.5V SUPPLY
地址总线宽度:3边界扫描:NO
最大时钟频率:64 MHz通信协议:ASYNC, BIT
最大数据传输速率:0.5 MBps外部数据总线宽度:8
JESD-30 代码:S-PQFP-G64长度:10 mm
低功率模式:NO湿度敏感等级:1
串行 I/O 数:4端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):225
电源:2.5/3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Serial IO/Communication Controllers
最大供电电压:3.63 V最小供电电压:2.97 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

XR16V554DIV 数据手册

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XR16V554/554D  
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO  
MAY 2007  
REV. 1.0.1  
FEATURES  
GENERAL DESCRIPTION  
Pin-to-pin compatible with ST16C454, ST16C554,  
The XR16V554 (V554) is  
a
quad Universal  
TI’s TL16C554A and Philip’s SC16C554B  
Asynchronous Receiver and Transmitter (UART) with  
16 bytes of transmit and receive FIFOs, selectable  
receive FIFO trigger levels and data rates of up to 4  
Mbps at 3.3 V. Each UART has a set of registers that  
provide the user with operating status and control,  
receiver error indications, and modem serial interface  
controls. An internal loopback capability allows  
onboard diagnostics. The V554 is available in a 48-  
pin QFN, 64-pin LQFP, 68-pin PLCC and 80-pin  
LQFP packages. The 64-pin and 80-pin packages  
only offer the 16 mode interface, but the 48- and 68-  
pin packages offer an additional 68 mode interface  
which allows easy integration with Motorola  
processors. The XR16V554IV (64-pin) offers three  
state interrupt output while the XR16V554DIV  
provides continuous interrupt output. The XR16V554  
is compatible with the industry standard ST16C554.  
Intel or Motorola Data Bus Interface select  
Four independent UART channels  
Register Set Compatible to 16C550  
Data rates of up to 4 Mbps at 3.3 V and 3.125  
Mbps at 2.5 V  
16 byte Transmit FIFO  
16 byte Receive FIFO with error tags  
4 Selectable RX FIFO Trigger Levels  
Full modem interface  
2.25V to 3.6V supply operation  
Crystal oscillator or external clock input  
APPLICATIONS  
Portable Appliances  
Telecommunication Network Routers  
Ethernet Network Routers  
Cellular Data Devices  
Factory Automation and Process Controls  
FIGURE 1. XR16V554 BLOCK DIAGRAM  
2.25V to 3.6 V VCC  
GND  
* 5 Volt Tolerant Inputs  
( Except XTAL1input)  
A2:A0  
D7:D0  
IOR#  
UART Channel A  
16 Byte TX FIFO  
UART  
Regs  
TXA, RXA, DTRA#,  
DSRA#, RTSA#, CTSA#,  
CDA#, RIA#  
IOW#  
CSA#  
CSB#  
TX &RX  
BRG  
16 Byte RX FIFO  
CSC#  
CSD#  
INTA  
TXB, RXB, DTRB#,  
DSRB#, RTSB#, CTSB#,  
CDB#, RIB#  
UART Channel B  
(same as Channel A)  
Data Bus  
Interface  
INTB  
INTC  
TXC, RXC, DTRC#,  
DSRC#, RTSC#, CTSC#,  
CDC#, RIC#  
UART Channel C  
(same as Channel A)  
INTD  
TXRDY#A-D  
RXRDY#A-D  
Reset  
TXD, RXD, DTRD#,  
DSRD#, RTSD#, CTSD#,  
CDD#, RID#  
UART Channel D  
(same as Channel A)  
16 68#  
/
XTAL1  
XTAL2  
Crystal Osc Buffer  
/
INTSEL  
554BLK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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