PRELIMINARY
XR16V2750
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
JUNE 2006
REV. P1.0.0
FEATURES
GENERAL DESCRIPTION
• 2.25 to 3.6 Volt Operation
• 5 Volt Tolerant Inputs
1
The XR16V2750 (V2750) is a high performance dual
universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 2.25 to 3.6 volts with 5 Volt tolerant
inputs and is pin-to-pin compatible to Exar’s
ST16C2550 and XR16L2750. The V2750 register set
is identical to the XR16L2750 and is compatible to the
ST16C2550 and the XR16C2850 enhanced features.
It supports the Exar’s enhanced features of
programmable FIFO trigger level and FIFO level
counters, automatic hardware (RTS/CTS) and
software flow control, automatic RS-485 half duplex
direction control output and a complete modem
interface. Onboard registers provide the user with
operational status and data error flags. An internal
loopback capability allows system diagnostics.
Independent programmable baud rate generators are
provided in each channel to select data rates up to 8
Mbps at 3.3 Volt and 8X sampling clock. The V2750
is available in 48-pin TQFP and 32-pin QFN
packages.
• Pin-to-pin compatible to Exar’s XR16L2750 and
TI’s TL16C752B in the 48-TQFP package
• Two independent UART channels
■ Register set compatible to XR16L2750
■ Data rate of up to 8 Mbps at at 3.3 V, and
6.25 Mbps at 2.5 V with 8X sampling rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic RS-485 Half-duplex Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
■ Full modem interface
• Portable Appliances
• Telecommunication Network Routers
• Ethernet Network Routers
• Device Identification and Revision
• Crystal oscillator (up to 32MHz) or external clock
(upto 64MHz) input
• 48-TQFP and 32-QFN packages
• Cellular Data Devices
• Factory Automation and Process Controls
FIGURE 1. XR16V2750 BLOCK DIAGRAM
* 5 Volt Tolerant Inputs
2.25 to 3.6 Volt VCC
A2:A0
D7:D0
GND
IOR#
IOW#
UART Channel A
TXA, RXA, DTRA#,
64 Byte TX FIFO
CSA#
CSB#
UART
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
Regs
IR
ENDEC
TX & RX
8-bit Data
Bus
Interface
INTA
INTB
BRG
64 Byte RX FIFO
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
UART Channel B
(same as Channel A)
Reset
XTAL1
XTAL2
Crystal Osc/Buffer
2750BLK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com