5秒后页面跳转
捷配首页

Datasheet > 可编程逻辑 > 现场可编程门阵列> XQ2V1000-4FG456N
XQ2V1000-4FG456N PDF预览

XQ2V1000-4FG456N

更新时间： 2024-09-20 03:13:59
品牌 Logo 应用领域
赛灵思 - XILINX 现场可编程门阵列可编程逻辑军事栅时钟
页数 文件大小 规格书
128页 2774K
描述
QPro Virtex-II 1.5V Military QML Platform FPGAs

阅读下载

中文翻译

获取价格

XQ2V1000-4FG456N 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：BGA
包装说明：1 MM PITCH, MO-151AAJ-1, FBGA-456针数：456
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01风险等级：5.83
最大时钟频率：650 MHzCLB-Max的组合延迟：0.44 ns
JESD-30 代码：S-PBGA-B456JESD-609代码：e0
长度：23 mm湿度敏感等级：3
可配置逻辑块数量：1280等效关口数量：1000000
输入次数：324逻辑单元数量：11520
输出次数：324端子数量：456
最高工作温度：125 °C最低工作温度：-55 °C
组织：1280 CLBS, 1000000 GATES封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA456,22X22,40
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：225电源：1.5,1.5/3.3,3.3 V
可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY认证状态：Not Qualified
座面最大高度：2.6 mm子类别：Field Programmable Gate Arrays
最大供电电压：1.575 V最小供电电压：1.425 V
标称供电电压：1.5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn63Pb37)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：23 mm
Base Number Matches：1

XQ2V1000-4FG456N 数据手册

 浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第2页浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第3页浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第4页浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第5页浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第6页浏览型号XQ2V1000-4FG456N的Datasheet PDF文件第7页 
0
R
QPro Virtex-II 1.5V Military QML  
Platform FPGAs  
0
0
DS122 (v1.1) January 7, 2004  
Product Specification  
Summary of QPro™ Virtex™-II Features  
•
Industry First Military Grade Platform FPGA Solution  
-
-
Fourth generation segmented routing structure  
Predictable, fast routing delay, independent of  
fanout  
•
Certified to MIL-PRF-38535 (Qualified Manufacturer  
Listing)  
•
SelectIO™-Ultra Technology  
•
•
100% Factory Tested  
Guaranteed over the full military temperature range  
(–55°C to +125° C)  
Ceramic and Plastic Wire-Bond and Flip-Chip Grid  
Array Packages  
-
-
-
Up to 824 user I/Os  
19 single-ended and six differential standards  
Programmable sink current (2 mA to 24 mA) per  
I/O  
•
•
-
Digitally Controlled Impedance (DCI) I/O: on-chip  
termination resistors for single-ended I/O standards  
PCI compliant (32/33 MHz) at 3.3V  
Differential Signaling  
IP-Immersion Architecture  
-
-
-
Densities from 1M to 6M system gates  
300+ MHz internal clock speed (Advance Data)  
622+ Mb/s I/O (Advance Data)  
-
-
·
622 Mb/s Low-Voltage Differential Signaling I/O  
(LVDS) with current mode drivers  
Bus LVDS I/O  
Lightning Data Transport (LDT) I/O with current  
driver buffers  
•
•
SelectRAM™ Memory Hierarchy  
-
2.5 Mb of dual-port RAM in 18 Kbit block  
SelectRAM resources  
·
·
-
Up to 1 Mb of distributed SelectRAM resources  
·
Low-Voltage Positive Emitter-Coupled Logic  
(LVPECL) I/O  
High-Performance Interfaces to External Memory  
-
DRAM interfaces  
·
Built-in DDR input and output registers  
·
·
·
SDR/DDR SDRAM  
Network FCRAM  
Reduced Latency DRAM  
-
Proprietary high-performance SelectLink  
Technology  
·
·
·
High-bandwidth data path  
Double Data Rate (DDR) link  
Web-based HDL generation methodology  
-
-
SRAM interfaces  
·
SDR/DDR SRAM  
·
QDR SRAM  
•
•
Supported by Xilinx Foundation Series™ and Alliance  
Series™ Development Systems  
CAM interfaces  
•
•
Arithmetic Functions  
-
-
-
-
-
Integrated VHDL and Verilog design flows  
Compilation of 10M system gates designs  
Internet Team Design (ITD) tool  
Dedicated 18-bit x 18-bit multiplier blocks  
Fast look-ahead carry logic chains  
Flexible Logic Resources  
-
SRAM-Based In-System Configuration  
Up to 67,584 internal registers/latches with Clock  
Enable  
Up to 67,584 look-up tables (LUTs) or cascadable  
16-bit shift registers  
Wide multiplexers and wide-input function support  
Horizontal cascade chain and sum-of-products  
support  
-
-
Fast SelectMAP configuration  
Triple Data Encryption Standard (DES) security  
option (Bitstream Encryption)  
IEEE 1532 support  
Partial reconfiguration  
Unlimited reprogrammability  
Readback capability  
-
-
-
-
-
-
-
-
Internal 3-state busing  
•
•
0.15 µm 8-Layer Metal Process with 0.12 µm  
High-Speed Transistors  
1.5V (VCCINT) Core Power Supply, Dedicated 3.3V  
VCCAUX Auxiliary and VCCO I/O Power Supplies  
•
•
High-Performance Clock Management Circuitry  
-
Up to 12 DCM (Digital Clock Manager) modules  
·
·
·
Precise clock de-skew  
Flexible frequency synthesis  
High-resolution phase shifting  
•
IEEE 1149.1 Compatible Boundary-Scan Logic  
Support  
-
16 global clock multiplexer buffers  
Active Interconnect Technology  
© 2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS122 (v1.1) January 7, 2004  
www.xilinx.com  
1
Product Specification  
1-800-255-7778  
1234567...128

中文翻译

下载PDF

XQ2V1000-4FG456N 替代型号

型号 品牌 替代类型 描述 数据表
XC2V1000-4FGG456C XILINX

完全替代

 Field Programmable Gate Array, 1280 CLBs, 1000000 Gates, 650MHz, 11520-Cell, CMOS, PBGA456

与XQ2V1000-4FG456N相关器件

型号 品牌 获取价格 描述 数据表
XQ2V1000-BG575I XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-BG575M XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-BG575N XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-BG728I XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-BG728M XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-BG728N XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-CF1144I XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-CF1144M XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-CF1144N XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs
XQ2V1000-CG717I XILINX

获取价格

 		QPro Virtex-II 1.5V Platform FPGAs

与XQ2V1000-4FG456N相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证