5秒后页面跳转
捷配首页

Datasheet > XCV200-4BGG256C
XCV200-4BGG256C PDF预览

XCV200-4BGG256C

更新时间： 2024-11-07 05:49:59
品牌 Logo 应用领域
赛灵思 - XILINX 栅
页数 文件大小 规格书
76页 739K
描述
Field Programmable Gate Array, 1176 CLBs, 236666 Gates, 250MHz, CMOS, PBGA256, BGA-256

阅读下载

中文翻译

获取价格

XCV200-4BGG256C 数据手册

 浏览型号XCV200-4BGG256C的Datasheet PDF文件第2页浏览型号XCV200-4BGG256C的Datasheet PDF文件第3页浏览型号XCV200-4BGG256C的Datasheet PDF文件第4页浏览型号XCV200-4BGG256C的Datasheet PDF文件第5页浏览型号XCV200-4BGG256C的Datasheet PDF文件第6页浏览型号XCV200-4BGG256C的Datasheet PDF文件第7页 
Product Obsolete/Under Obsolescence  
0
R
Virtex™ 2.5 V  
Field Programmable Gate Arrays  
0
0
DS003-1 (v4.0) March 1, 2013  
Product Specification  
Features  
•
Fast, high-density Field Programmable Gate Arrays  
•
•
Supported by FPGA Foundation™ and Alliance  
Development Systems  
-
-
-
-
Densities from 50k to 1M system gates  
System performance up to 200 MHz  
66-MHz PCI Compliant  
-
Complete support for Unified Libraries, Relationally  
Placed Macros, and Design Manager  
-
Wide selection of PC and workstation platforms  
Hot-swappable for Compact PCI  
SRAM-based in-system configuration  
•
•
Multi-standard SelectIO™ interfaces  
-
-
Unlimited re-programmability  
Four programming modes  
-
-
16 high-performance interface standards  
Connects directly to ZBTRAM devices  
•
•
0.22 μm 5-layer metal process  
100% factory tested  
Built-in clock-management circuitry  
-
Four dedicated delay-locked loops (DLLs) for  
advanced clock control  
Description  
-
Four primary low-skew global clock distribution  
nets, plus 24 secondary local clock nets  
The Virtex FPGA family delivers high-performance,  
high-capacity programmable logic solutions. Dramatic  
increases in silicon efficiency result from optimizing the new  
architecture for place-and-route efficiency and exploiting an  
aggressive 5-layer-metal 0.22 μm CMOS process. These  
advances make Virtex FPGAs powerful and flexible alterna-  
tives to mask-programmed gate arrays. The Virtex family  
comprises the nine members shown in Table 1.  
•
•
Hierarchical memory system  
-
-
-
LUTs configurable as 16-bit RAM, 32-bit RAM,  
16-bit dual-ported RAM, or 16-bit Shift Register  
Configurable synchronous dual-ported 4k-bit  
RAMs  
Fast interfaces to external high-performance RAMs  
Flexible architecture that balances speed and density  
-
-
-
-
Dedicated carry logic for high-speed arithmetic  
Dedicated multiplier support  
Cascade chain for wide-input functions  
Abundant registers/latches with clock enable, and  
dual synchronous/asynchronous set and reset  
Internal 3-state bussing  
Building on experience gained from previous generations of  
FPGAs, the Virtex family represents a revolutionary step  
forward in programmable logic design. Combining a wide  
variety of programmable system features, a rich hierarchy of  
fast, flexible interconnect resources, and advanced process  
technology, the Virtex family delivers a high-speed and  
high-capacity programmable logic solution that enhances  
design flexibility while reducing time-to-market.  
-
-
-
IEEE 1149.1 boundary-scan logic  
Die-temperature sensor diode  
Table 1: Virtex Field Programmable Gate Array Family Members  
Maximum  
Block RAM  
Bits  
Maximum  
SelectRAM+™ Bits  
Device  
System Gates  
CLB Array  
Logic Cells  
Available I/O  
XCV50  
57,906  
16x24  
1,728  
180  
180  
260  
284  
316  
404  
512  
512  
512  
32,768  
40,960  
49,152  
57,344  
65,536  
81,920  
98,304  
114,688  
131,072  
24,576  
38,400  
55,296  
75,264  
98,304  
153,600  
221,184  
301,056  
393,216  
XCV100  
XCV150  
XCV200  
XCV300  
XCV400  
XCV600  
XCV800  
XCV1000  
108,904  
20x30  
2,700  
164,674  
24x36  
3,888  
236,666  
28x42  
5,292  
322,970  
32x48  
6,912  
468,252  
40x60  
10,800  
15,552  
21,168  
27,648  
661,111  
48x72  
888,439  
56x84  
1,124,022  
64x96  
© 2001-2013 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS003-1 (v4.0) March 1, 2013  
Product Specification  
www.xilinx.com  
1-800-255-7778  
Module 1 of 4  
1
1234567...76

中文翻译

下载PDF

与XCV200-4BGG256C相关器件

型号 品牌 获取价格 描述 数据表
XCV200-4FG256C XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4FG256I XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4FG456C XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4FG456I XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4FGG456C XILINX

获取价格

 		Field Programmable Gate Array, 1176 CLBs, 236666 Gates, 250MHz, CMOS, PBGA456, FBGA-456
XCV200-4HQ240C XILINX

获取价格

 		Field Programmable Gate Array, 1176 CLBs, 236666 Gates, 250MHz, PQFP240, HQ240
XCV200-4PQ240C XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4PQ240I XILINX

获取价格

 		Field Programmable Gate Arrays
XCV200-4PQG240C XILINX

获取价格

 		Field Programmable Gate Array, 1176 CLBs, 236666 Gates, 250MHz, CMOS, PQFP240, PLASTIC, QF
XCV200-4PQG240I XILINX

获取价格

 		Field Programmable Gate Array, 1176 CLBs, 236666 Gates, 250MHz, CMOS, PQFP240, PLASTIC, QF

与XCV200-4BGG256C相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证