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XC2S100-6CSG144I

更新时间: 2024-09-19 07:06:35
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赛灵思 - XILINX /
页数 文件大小 规格书
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描述
Spartan-II FPGA Family

XC2S100-6CSG144I 数据手册

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Spartan-II FPGA Family  
Data Sheet  
DS001 June 13, 2008  
Product Specification  
This document includes all four modules of the Spartan®-II FPGA data sheet.  
Module 1:  
Introduction and Ordering Information  
Module 3:  
DC and Switching Characteristics  
DS001-1 (v2.8) June 13, 2008  
DS001-3 (v2.8) June 13, 2008  
Introduction  
DC Specifications  
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Absolute Maximum Ratings  
Recommended Operating Conditions  
DC Characteristics  
Power-On Requirements  
DC Input and Output Levels  
Features  
General Overview  
Product Availability  
User I/O Chart  
Ordering Information  
Switching Characteristics  
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Pin-to-Pin Parameters  
Module 2:  
IOB Switching Characteristics  
Clock Distribution Characteristics  
DLL Timing Parameters  
CLB Switching Characteristics  
Block RAM Switching Characteristics  
TBUF Switching Characteristics  
JTAG Switching Characteristics  
Functional Description  
DS001-2 (v2.8) June 13, 2008  
Architectural Description  
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Spartan-II Array  
Input/Output Block  
Configurable Logic Block  
Block RAM  
Clock Distribution: Delay-Locked Loop  
Boundary Scan  
Module 4:  
Pinout Tables  
Development System  
Configuration  
DS001-4 (v2.8) June 13, 2008  
Pin Definitions  
Pinout Tables  
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Configuration Timing  
Design Considerations  
IMPORTANT NOTE: This Spartan-II FPGA data sheet is in four modules. Each module has its own Revision History at the  
end. Use the PDF "Bookmarks" for easy navigation in this volume.  
© 2000-2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other  
trademarks are the property of their respective owners.  
DS001 June 13, 2008  
www.xilinx.com  
Product Specification  
1

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