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X2N5457

更新时间: 2024-09-15 23:29:59
品牌 Logo 应用领域
其他 - ETC 晶体晶体管开关
页数 文件大小 规格书
1页 19K
描述
TRANSISTOR | JFET | N-CHANNEL | 5MA I(DSS) | CHIP

X2N5457 数据手册

  
N-Channel JFET  
General Purpose Amplifier/Switch  
CORPORATION  
2N5457 – 2N5459  
ABSOLUTE MAXIMUM RATINGS  
(TA = 25oC unless otherwise noted)  
PIN CONFIGURATION  
Drain-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V  
Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V  
Continuous Forward Gate Current . . . . . . . . . . . . . . . . 10mA  
Storage Temperature Range . . . . . . . . . . . . . -65oC to +150oC  
Operating Temperature Range . . . . . . . . . . . -55oC to +135oC  
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310mW  
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . 2.82mW/oC  
TO-92  
NOTE: Stresses above those listed under "Absolute Maximum  
Ratings" may cause permanent damage to the device. These are  
stress ratings only and functional operation of the device at these or  
any other conditions above those indicated in the operational sections  
of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
G
S
D
ORDERING INFORMATION  
5010  
Part  
Package  
Temperature Range  
2N5457-59 Plastic TO-92  
X2N5457-59 Sorted Chips in Carriers  
-55oC to +135oC  
-55oC to +135oC  
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)  
SYMBOL  
PARAMETER  
MIN  
MAX  
UNITS  
TEST CONDITIONS  
IG = -10µA, VDS = 0  
BVGSS  
Gate-Source Breakdown Voltage  
-25  
V
-1.0  
-200  
-6.0  
-7.0  
-8.0  
V
GS = -15V, VDS = 0  
GS = -15V, VDS = 0, TA = 100oC  
IGSS  
Gate Reverse Current  
nA  
V
2N5457  
2N5458  
2N5459  
2N5457  
2N5458  
2N5459  
2N5457  
2N5458  
2N5459  
2N5457  
2N5458  
2N5459  
-0.5  
-1.0  
-2.0  
2.5  
VDS = 15V, ID = 10nA  
VGS(off)  
Gate-Source Cutoff Voltage  
V
VDS = 15V, ID = 100µA, Typical  
VGS  
Gate-Source Voltage  
V
3.5  
VDS = 15V, ID = 200µA, Typical  
VDS = 15V, ID = 400µA, Typical  
VDS = 15V, VGS = 0  
4.5  
1.0  
5.0  
9.0  
Zero-Gate-Voltage Drain Current  
(Note 1)  
IDSS  
mA  
µS  
2.0  
4.0  
16  
1000  
1500  
2000  
5000  
5500  
6000  
50  
VDS = 15V, VGS = 0 , f = 1kHz  
| yfs  
|
Forward Transfer Admittance  
| yos  
Ciss  
Crss  
NF  
|
Output Admittance  
µS  
pF  
pF  
dB  
VDS = 15V, VGS = 0, f = 1kHz  
VDS = 15V, VGS = 0, f = 1MHz  
VDS = 15V, VGS = 0, f = 1MHz  
Input Capacitance (Note 2)  
7.0  
Reverse Transfer Capacitance (Note 2)  
Noise Figure (Note 2)  
3.0  
3.0  
VDS = 15V, VGS = 0, RG = 1MHz, BW = 1Hz, f = 1kHz  
NOTES: 1. Pulse test required. PW 630ms, duty cycle 10%.  
2. For design reference only, not 100% tested.  

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