Datasheet > WED3C755E8M-300BH9C

WED3C755E8M-300BH9C

更新时间： 2024-01-22 00:21:44

品牌	Logo	应用领域
WEDC		/
页数	文件大小	规格书
16页	617K
描述
RISC Microprocessor, 32-Bit, 300MHz, CMOS, CBGA255, 21 X 25 MM, 3.90 MM HEIGHT, 1.27 MM PITCH, CERAMIC, HITCE, BGA-255

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WED3C755E8M-XBHX

White Electronic Designs

755E RISC MICROPROCESSOR HiTCE™ MULTI-CHIP PACKAGE

OVERVIEW

FEATURES

The WEDC 755E/SSRAM multichip package is targeted

for high performance, space sensitive, low power systems

and supports the following power management features:

doze, nap, sleep and dynamic power management. The

WED3C755E8M-XBHX multichip package consists of:

The WED3C755E8M-XBHX is offered in Commercial

(0°C to +70°C), industrial (-40°C to +85°C) and military

(-55°C to +125°C) temperature ranges and is well suited

for embedded applications such as missiles, aerospace,

ﬂight computers, ﬁre control systems and rugged critical

systems.

755 RISC processor (E die revision)

Footprint compatible with WED3C755E8M-XBX,

WED3C7558M-XBX and WED3C750A8M-200BX

Dedicated 1MB SSRAM L2 cache, conﬁgured as

128Kx72

Pinout compatible with WED3C755E8MF-XBX

Footprint compatible with Motorola MPC 745

21mmx25mm, 255 HiTCE™ Ball Grid Array (HBGA)

Core Frequency/L2 Cache Frequency (300MHz/

150MHz, 350MHz/175MHz)

HiTCE™ interposer for TCE compatibility to

laminate substrates for increased board level

reliability

Maximum 60x Bus frequency = 66MHz

This product is subject to change without notice.

FIGURE 1 – MULTI-CHIP PACKAGE DIAGRAM

SSRAM

μP

755E

SSRAM

HiTCE™ is a trademark of Kyocera Corp.

October 2005

Rev. 2

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

12 3 4 5 6 7...16

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WED3C755E8M-350BHC	WEDC	获取价格	RISC Microprocessor, 32-Bit, 350MHz, CMOS, CBGA255, 21 X 25 MM, 3.90 MM HEIGHT, 1.27 MM PI