W83194BR-B
STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET
TABLE OF CONTENT
1. GENERAL DESCRIPTION..................................................................................... 1
2. PRODUCT FEATURES.......................................................................................... 1
3. PIN CONFIGURATION........................................................................................... 2
4. BLOCK DIAGRAM ................................................................................................. 2
5. PIN DESCRIPTION................................................................................................. 3
5.1 CRYSTAL I/O ........................................................................................................................................3
5.2 CPU, 3V66, AND PCI CLOCK OUTPUTS...........................................................................................3
5.3 I2C CONTROL INTERFACE.................................................................................................................4
5.4 FIXED FREQUENCY OUTPUTS.........................................................................................................5
5.5 POWER PINS........................................................................................................................................5
6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE ............................ 6
7. I2C CONTROL AND STATUS REGISTERS........................................................... 7
7.1 REGISTER 1: FREQUENCY SELECT REGISTER (DEFAULT = 0).................................................7
7.2 REGISTER 2: CPU CLOCK REGISTER (1 = ENABLE, 0 = STOPPED) ..........................................7
7.3 REGISTER 3: PCI CLOCK REGISTER (1 = ENABLE, 0 = STOPPED) ............................................7
7.4 REGISTER 4: PCI, 48MHZ CLOCK REGISTER (1 = ENABLE, 0 = STOPPED)..............................8
7.5 REGISTER 5: 3V66 CONTROL REGISTER (1 = ENABLE, 0 = STOPPED) ....................................8
7.6 REGISTER 6: WATCHDOG CONTROL REGISTER .........................................................................8
7.7 REGISTER 7: WATCHDOG TIMER REGISTER................................................................................9
7.8 REGISTER 8: M/N PROGRAM REGISTER........................................................................................9
7.9 REGISTER 9: M/N PROGRAM REGISTER........................................................................................9
7.10 REGISTER 10: SPREAD SPECTRUM PROGRAMMING REGISTER.........................................10
7.11 REGISTER 11: DIVISOR AND STEP-LESS ENABLE AND SKEW CONTROL REGISTER.......10
7.12 REGISTER 12: WINBOND CHIP ID REGISTER (READ ONLY)................................................11
7.13 REGISTER 13: WINBOND CHIP ID REGISTER (READ ONLY)................................................11
7.14 REGISTER 81: WINBOND TEST REGISTER I ..............................................................................11
7.15 REGISTER 82: WINBOND TEST REGISTER II .............................................................................11
8. ACCESS INTERFACE.......................................................................................... 12
8.1 BLOCK WRITE PROTOCOL..............................................................................................................12
8.2 BLOCK READ PROTOCOL ...............................................................................................................12
8.3 BYTE WRITE PROTOCOL.................................................................................................................12
8.4 BYTE READ PROTOCOL ..................................................................................................................12
9. SPECIFICATIONS................................................................................................ 13
9.1 ABSOLUTE MAXIMUM RATINGS.....................................................................................................13
Publication Release Date: February 2003
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Revision 2.0
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