W3EG64128S-D3
-JD3
White Electronic Designs
ADVANCED*
1GB – 2x64Mx64 DDR SDRAM UNBUFFERED
FEATURES
DESCRIPTION
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Double-data-rate architecture
The W3EG64128S is a 2x64Mx64 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
component. The module consists of sixteen 64Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
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Clock speeds of 100MHz, 133MHz, 166MHz and
200MHz
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DDR200, DDR266, DDR333 and DDR400
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
Serial presence detect
NOTE: Consult factory for availability of:
• RoHS compliant products
Dual Rank
• Vendor source control options
• Industrial temperature option
Power supply:
• VCC = VCCQ = +2.5V 0.2V (100, 133 and 166 MHz)
• VCC = VCCQ = +2.6V 0.1V (200 MHz)
JEDEC standard 184 pin DIMM package
• JD3 PCB height: 30.48 (1.20") MAX
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OPERATING FREQUENCIES
DDR400 @ CL=3
200MHz
DDR333 @ CL=2.5
166MHz
DDR266 @ CL=2
133MHz
DDR266 @ CL=2
133MHz
DDR266 @ CL=2.5
133MHz
DDR200 @ CL=2
100MHz
Clock Speed
CL-tRCD-tRP
3-3-3
2.5-3-3
2-2-2
2-3-3
2.5-3-3
2-2-2
May 2005
Rev. 5
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com