Datasheet > W144

W144

更新时间： 2024-01-04 22:55:37

品牌	Logo	应用领域
SPECTRALINEAR		/
页数	文件大小	规格书
13页	201K
描述
440BX AGPset Spread Spectrum Frequency Synthesizer

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W144 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8541.40.20.00	风险等级：	5.77
其他特性：	HIGH RELIABILITY	颜色：	YELLOW
配置：	SINGLE	最大正向电流：	0.03 A
透镜类型：	DIFFUSED	标称发光强度：	3.0 mcd
安装特点：	RADIAL MOUNT	功能数量：	1
端子数量：	2	最高工作温度：	85 °C
最低工作温度：	-40 °C	光电设备类型：	SINGLE COLOR LED
总高度：	7 mm	包装方法：	BULK
峰值波长：	590 nm	形状：	RECTANGULAR
尺寸：	3.9 mm	表面贴装：	NO
端子节距：	2.54 mm	视角：	110 deg
Base Number Matches：	1

W144 数据手册

W144

Operation

Serial Data Interface

Data is written to the W144 in eleven bytes of eight bits each.

Bytes are written in the order shown in Table 4.

The W144 features a two-pin, serial data interface that can be

used to configure internal register settings that control

particular device functions. Upon power-up, the W144

initializes with default register settings, therefore the use of this

serial data interface is optional. The serial interface is

write-only (to the clock chip) and is the dedicated function of

device pins SDATA and SCLOCK. In motherboard applica-

tions, SDATA and SCLOCK are typically driven by two logic

outputs of the chipset. Clock device register changes are

normally made upon system initialization, if any are required.

The interface can also be used during system operation for

power management functions. Table 3 summarizes the control

functions of the serial data interface.

Table 3. Serial Data Interface Control Functions Summary

Control Function

Description

Common Application

Clock Output Disable

Any individual clock output(s) can be disabled.

Disabled outputs are actively held LOW.

Unused outputs are disabled to reduce EMI

and system power. Examples are clock outputs

to unused PCI slots.

CPU Clock Frequency

Selection

Provides CPU/PCI frequency selections through

software. Frequency is changed in a smooth and

controlled fashion.

For alternate microprocessors and power

management options. Smooth frequency

transition allows CPU frequency change under

normal system operation.

Spread Spectrum

Enabling

Enables or disables spread spectrum clocking.

For EMI reduction.

Output Three-state

(Reserved)

Puts clock output into a high-impedance state.

Production PCB testing.

Reserved function for future device revision or

production device testing.

No user application. Register bit must be

written as 0.

Table 4. Byte Writing Sequence

Byte

Sequence

Byte Name

Bit Sequence

Byte Description

Slave Address

11010010

Commands the W144 to accept the bits in Data Bytes 0–6 for internal

common serial data bus, it is necessary to have a specific slave address

for each potential receiver. The slave receiver address for the W144 is

11010010. Register setting will not be made if the Slave Address is not

correct (or is for an alternate slave receiver).

Command Code

Byte Count

Don’t Care

Unused by the W144, therefore bit values are ignored (“don’t care”). This

byte must be included in the data write sequence to maintain proper byte

allocation. The Command Code Byte is part of the standard serial

communication protocol and may be used when writing to another

addressed slave receiver on the serial data bus.

Unused by the W144, therefore bit values are ignored (“don’t care”). This

byte must be included in the data write sequence to maintain proper byte

allocation. The Byte Count Byte is part of the standard serial communi-

cationprotocoland maybe used whenwritingto another addressed slave

receiver on the serial data bus.

Rev 1.0,November 21, 2006

Page 5 of 13

1 2 3 456 7 8...13

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