VSC8489-10 and VSC8489-13
Dual Channel WAN/LAN/Backplane
RXAUI/XAUI to SFP+/KR 10 GbE SerDes PHY
with VeriTime™
Highlights
• IEEE 1588v2 compliant
• Failover switching and lane ordering
• Simultaneous LAN and WAN support
• RXAUI/XAUI support
Vitesse’s dual channel SerDes PHY provides fully
IEEE 1588v2-compliant devices and hardware-based KR
support for timing-critical applications, including all
industry-standard protocol encapsulations.
• SFP+ I/O with KR support
• 1 GbE support
VeriTime™ is Vitesse’s patent-pending distributed timing technology
that delivers the industry’s most accurate IEEE 1588v2 timing
implementation. IEEE 1588v2 timing integrated in the PHY is the
quickest, lowest cost method of implementing the timing accuracy that
is critical to maintaining existing timing-critical capabilities during the
migration from TDM to packet-based architectures.
Applications
• Multiple-port RXAUI/XAUI to
SFI/ SFP+ line cards or NICs
• 10GBASE-KR compliant backplane
transceivers
The VSC8489-10 and VSC8489-13 devices support 1-step and 2-step
PTP frames for ordinary clock, boundary clock, and transparent clock
applications, along with complete Y.1731 OAM performance
monitoring capabilities.
• Carrier Ethernet networks requiring
IEEE 1588v2 timing
• Secure data center to data center
interconnects
The devices meet the SFP+ SR/LR/ER/220MMF host requirements in
accordance with the SFF-8431 specifications. They also compensate
for optical impairments in SFP+ applications, along with degradations
of the PCB.
• 10 GbE switch cards and router cards
The devices provide full KR support, including KR state machine, for autonegotiation and link optimization. The
transmit path incorporates a multitap output driver to provide flexibility to meet the demanding 10GBASE-KR
(IEEE 802.3ap) Tx output launch requirements.
Highly flexible clocking options enable Layer 1 support for Synchronous Ethernet. The devices use a single
156.25 MHz reference clock for LAN/WAN operation. They include a failover switching capability for protection routing,
along with selectable lane ordering. A complete suite of BIST functionality includes line and client loopbacks along with
pattern generation and error detection.
10 GbE Line Card or NIC
Switch Module
2×10G
2×1G
RXAUI/XAUI
2/4
2/4
2/4
RXAUI/
XAUI
Switch
SFP+/XFP
SFP+/XFP
Dual
VSC8489
VSC8489
10 GbE
MAC/NIC
2/4
2×10G/
2×1G
RXAUI/
XAUI
10GBASE-KR Backplane
www.vitesse.com
Making next-generation networks a reality.