VSC8211
Datasheet
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SerDes Specifications ................................................................................................................................................ 144
System Timing Specifications .................................................................................................................................. 145
30.1 GMII Mode Transmit Timing (1000BASE-T) ..................................................................................... 145
30.2 GMII Mode Receive Timing (1000BASE-T) ...................................................................................... 146
30.3 MII Transmit Timing (100Mbps) ........................................................................................................ 147
30.4 MII Receive Timing (100Mbps) ......................................................................................................... 147
30.5 TBI Mode Transmit Timing ............................................................................................................... 148
30.6 TBI Mode Receive Timing ................................................................................................................ 149
30.7 RGMII/RTBI Mode Timing ................................................................................................................ 150
30.8 JTAG Timing ..................................................................................................................................... 153
30.9 SMI Timing ....................................................................................................................................... 154
30.10 MDINT Timing .................................................................................................................................. 155
30.11 Serial LED_CLK and LED_DATA Timing ......................................................................................... 155
30.12 REFCLK Timing ................................................................................................................................ 156
30.13 CLKOUTMAC and CLKOUTMICRO Timing ..................................................................................... 157
30.14 Reset Timing .................................................................................................................................... 158
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Packaging Specifications .......................................................................................................................................... 159
31.1 Package Moisture Sensitivity ............................................................................................................ 159
Ordering Information .................................................................................................................................................. 160
32.1 Devices ............................................................................................................................................. 160
Design Guidelines ....................................................................................................................................................... 161
33.1 Required PHY Register Write Sequence .......................................................................................... 161
33.2 Interoperability with Intel 82547EI Gigabit Ethernet MAC+PHY IC .................................................. 161
33.3 SerDes Jitter ..................................................................................................................................... 161
33.4 100BASE-FX Initialization Script ...................................................................................................... 162
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Product Support .......................................................................................................................................................... 165
34.1 Available Documents and Application Notes .................................................................................... 165
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VMDS-10105 Revision 4.1
October 2006