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VSC8211VXW PDF预览

VSC8211VXW

更新时间： 2024-01-29 00:33:40
品牌 Logo 应用领域
VITESSE /
页数 文件大小 规格书
165页 1754K
描述
Ethernet Transceiver, PBGA117, 10 X 14 MM, 1 MM PITCH, LEAD FREE, LBGA-117

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中文翻译

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VSC8211VXW 技术参数

生命周期：Transferred零件包装代码：BGA
包装说明：LBGA,针数：117
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.76JESD-30 代码：R-PBGA-B117
长度：14 mm功能数量：1
端子数量：117封装主体材料：PLASTIC/EPOXY
封装代码：LBGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE认证状态：Not Qualified
座面最大高度：1.7 mm标称供电电压：1.2 V
表面贴装：YES电信集成电路类型：ETHERNET TRANSCEIVER
端子形式：BALL端子节距：1 mm
端子位置：BOTTOM宽度：10 mm
Base Number Matches：1

VSC8211VXW 数据手册

 浏览型号VSC8211VXW的Datasheet PDF文件第6页浏览型号VSC8211VXW的Datasheet PDF文件第7页浏览型号VSC8211VXW的Datasheet PDF文件第8页浏览型号VSC8211VXW的Datasheet PDF文件第10页浏览型号VSC8211VXW的Datasheet PDF文件第11页浏览型号VSC8211VXW的Datasheet PDF文件第12页 
VSC8211  
Datasheet  
29  
30  
SerDes Specifications ................................................................................................................................................ 144  
System Timing Specifications .................................................................................................................................. 145  
30.1 GMII Mode Transmit Timing (1000BASE-T) ..................................................................................... 145  
30.2 GMII Mode Receive Timing (1000BASE-T) ...................................................................................... 146  
30.3 MII Transmit Timing (100Mbps) ........................................................................................................ 147  
30.4 MII Receive Timing (100Mbps) ......................................................................................................... 147  
30.5 TBI Mode Transmit Timing ............................................................................................................... 148  
30.6 TBI Mode Receive Timing ................................................................................................................ 149  
30.7 RGMII/RTBI Mode Timing ................................................................................................................ 150  
30.8 JTAG Timing ..................................................................................................................................... 153  
30.9 SMI Timing ....................................................................................................................................... 154  
30.10 MDINT Timing .................................................................................................................................. 155  
30.11 Serial LED_CLK and LED_DATA Timing ......................................................................................... 155  
30.12 REFCLK Timing ................................................................................................................................ 156  
30.13 CLKOUTMAC and CLKOUTMICRO Timing ..................................................................................... 157  
30.14 Reset Timing .................................................................................................................................... 158  
31  
32  
33  
Packaging Specifications .......................................................................................................................................... 159  
31.1 Package Moisture Sensitivity ............................................................................................................ 159  
Ordering Information .................................................................................................................................................. 160  
32.1 Devices ............................................................................................................................................. 160  
Design Guidelines ....................................................................................................................................................... 161  
33.1 Required PHY Register Write Sequence .......................................................................................... 161  
33.2 Interoperability with Intel 82547EI Gigabit Ethernet MAC+PHY IC .................................................. 161  
33.3 SerDes Jitter ..................................................................................................................................... 161  
33.4 100BASE-FX Initialization Script ...................................................................................................... 162  
34  
Product Support .......................................................................................................................................................... 165  
34.1 Available Documents and Application Notes .................................................................................... 165  
9 of 165  
VMDS-10105 Revision 4.1  
October 2006  
1...6789101112...165

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