VSC8211
Datasheet
19
20
Hardware Configuration Using CMODE Pins ........................................................................................................... 66
19.1 Setting the CMODE Configuration Bits ............................................................................................... 66
19.2 CMODE Bit descriptions ..................................................................................................................... 66
19.3 Procedure For Selecting CMODE Pin Pull-up/Pull-down Resistor Values ......................................... 71
EEPROM Interface ........................................................................................................................................................ 72
20.1 Programming Multiple VSC8211s Using the Same EEPROM ........................................................... 73
21
22
PHY Startup and Initialization ...................................................................................................................................... 75
PHY Operating Modes .................................................................................................................................................. 76
22.1 PHY Operating Mode Description ...................................................................................................... 76
22.1.1
22.1.2
Auto Media Sense (AMS) Media Interface PHY Operating Modes ...................................................76
Serial MAC to Serial Media PHY Operating Mode: ............................................................................77
23
24
IEEE802.3 Clause 28/37 Remote Fault Indication Support .................................................................................... 77
PHY Register Set Conventions ................................................................................................................................... 80
24.1 PHY's Register Set Structure ............................................................................................................. 80
24.2 PHY's Register Set Nomenclature ...................................................................................................... 81
24.3 PHY Register Bit Types ...................................................................................................................... 81
25
PHY Register Set ........................................................................................................................................................... 82
25.1 Clause 28/37 Resister View ............................................................................................................... 82
25.2 PHY Register Names and Addresses ................................................................................................ 83
25.3 MII Register Descriptions ................................................................................................................... 85
25.3.1
25.3.2
25.3.3
25.3.4
25.3.5
25.3.6
25.3.7
25.3.8
25.3.9
Register 0 (00h) – Mode Control Register - Clause 28/37 View ........................................................85
Register 1 (01h) – Mode Status Register - Clause 28/37 View ..........................................................86
Register 2 (02h) – PHY Identifier Register #1 - Clause 28/37 View ..................................................88
Register 3 (03h) – PHY Identifier Register #2 - Clause 28/37 View ..................................................88
Register 4 (04h) – Auto-Negotiation Advertisement Register ............................................................89
Register 5 (05h) – Auto-Negotiation Link Partner Ability Register .....................................................91
Register 6 (06h) – Auto-Negotiation Expansion Register ...................................................................93
Register 7 (07h) – Auto-Negotiation Next-Page Transmit Register - Clause 28/37 View ................94
Register 8 (08h)–Auto-Negotiation Link Partner Next-Page Receive Register,Clause 28/37 View 95
25.3.10 Register 9 (09h) – 1000BASE-T Control Register ..............................................................................96
25.3.11 Register 10 (0Ah) – 1000BASE-T Status Register #1 ........................................................................98
25.3.12 Register 11 (0Bh) – Reserved Register .............................................................................................100
25.3.13 Register 12 (0Ch) – Reserved Register .............................................................................................100
25.3.14 Register 13 (0Dh) – Reserved Register .............................................................................................100
25.3.15 Register 14 (0Eh) – Reserved Register .............................................................................................100
25.3.16 Register 15 (0Fh) – 1000BASE-T Status Register #2 ......................................................................101
25.3.17 Register 16 (10h) – Reserved .............................................................................................................102
25.3.18 Register 17 (11h) – Reserved .............................................................................................................102
25.3.19 Register 18 (12h) – Bypass Control Register ....................................................................................103
25.3.20 Register 19 (13h) – Reserved............................................................................................................. 105
7 of 165
VMDS-10105 Revision 4.1
October 2006
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