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V62/04644-01YE

更新时间： 2024-11-16 12:17:03
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管信息通信管理双倍数据速率
页数 文件大小 规格书
42页 764K
描述
3.3-V 10-BIT ADDRESSABLE SCAN PORT MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (KTAG) TAP TRANSCEIVER

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V62/04644-01YE 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP24,.25针数：24
Reach Compliance Code：compliantHTS代码：8542.31.00.01
Factory Lead Time：6 weeks风险等级：5.63
Is Samacsys：N外部数据总线宽度：
JESD-30 代码：R-PDSO-G24JESD-609代码：e4
长度：7.8 mm湿度敏感等级：1
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3/3.3 V
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Other Microprocessor ICs最大供电电压：3.6 V
最小供电电压：2.7 V标称供电电压：3.3 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmuPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUIT
Base Number Matches：1

V62/04644-01YE 数据手册

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SCBS764 − SEPTEMBER 2003  
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
Simple Addressing (Shadow) Protocol Is  
Received/Acknowledged on Primary TAP  
10-Bit Address Space Provides for up to  
1021 User-Specified Board Addresses  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Bypass (BYP) Pin Forces  
Primary-to-Secondary Connection Without  
Use of Shadow Protocols  
Enhanced Product-Change Notification  
†
Qualification Pedigree  
D
D
Connect (CON) Pin Provides Indication of  
Primary-to-Secondary Connection  
Member of the Texas Instruments (TI)  
Broad Family of Testability Products  
Supporting IEEE Std 1149.1-1990 (JTAG)  
Test Access Port (TAP) and Boundary-Scan  
Architecture  
High-Drive Outputs (−32-mA I , 64-mA I  
)
OL  
OH  
Support Backplane Interface at Primary and  
High Fanout at Secondary  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
D
Extends Scan Access From Board Level to  
Higher Levels of System Integration  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Promotes Reuse of Lower-Level  
(Chip/Board) Tests in System Environment  
While Powered at 3.3 V, Both the Primary  
and Secondary TAPs Are Fully 5-V Tolerant  
for Interfacing to 5-V and/or 3.3-V Masters  
and Targets  
− 1000-V Charged-Device Model (C101)  
PW PACKAGE  
(TOP VIEW)  
D
D
D
Switch-Based Architecture Allows Direct  
Connect of Primary TAP to Secondary TAP  
A4  
A3  
A2  
A1  
A0  
A5  
A6  
A7  
A8  
A9  
V
CON  
STDI  
STCK  
STMS  
STDO  
STRST  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Primary TAP Is Multidrop for Minimal Use of  
Backplane Wiring Channels  
2
3
4
Shadow Protocols Can Occur in Any of  
Test-Logic-Reset, Run-Test/Idle, Pause-DR,  
and Pause-IR TAP States to Provide for  
Board-to-Board Test and Built-In Self-Test  
5
BYP  
GND  
PTDO  
PTCK  
PTMS  
PTDI  
PTRST  
6
CC  
7
†
8
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
9
10  
11  
12  
description/ordering information  
The SN74LVT8996 10-bit addressable scan port (ASP) is a member of the Texas Instruments SCOPEtestability  
integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing  
of complex circuit assemblies. Unlike most SCOPEdevices, the ASP is not a boundary-scannable device, rather,  
it applies TI’s addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test access port (TAP) to  
extend scan access beyond the board level.  
This device is functionally equivalent to the ’ABT8996 ASPs. Additionally, it is designed specifically for low-voltage  
(3.3-V) V  
operation, but with the capability to interface to 5-V masters and/or targets.  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SCOPE is a trademark of Texas Instruments.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...42

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