Datasheet > V61C5181024

V61C5181024

更新时间： 2024-09-08 22:09:31

品牌	Logo	应用领域
MOSEL		/
页数	文件大小	规格书
12页	64K
描述
128K X 8 HIGH SPEED STATIC RAM

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中文翻译

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数据手册

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V61C5181024 数据手册

PRELIMINARY

V61C5181024

MO SEL VITELIC

128K X 8 HIGH SPEED

STATIC RAM

■ Packages

Features

■ High-speed: 10, 12, 15 ns

■ Fully static operation

– 32-pin TSOP

– 32-pin 300 mil SOJ

■ All inputs and outputs directly TTL compatible

■ Three state outputs

Description

■ Low data retention current (V = 2V)

The V61C5181024 is a 1,048,576-bit static

random-access memory organized as 131,072

words by 8 bits. Inputs and three-state outputs are

TTL compatible and allow for direct interfacing

with common system bus structures. The

V61C5181024 is available in 32-pin SOJ, PDIP and

TSOP.

■ Single 5V ± 10% Power Supply

■ Low CMOS Standby current of 5 mA max

Functional Block Diagram

A₀

V_CC

GND

Row

Decoder

Memory Array

A₈

I/O₀

Column I/O

Input

Data

Circuit

Column Decoder

I/O₇

A₉

A₁₆

CE₁

CE₂

Control

Circuit

5181024 01

Device Usage Chart

Operating

Temperature

Range

Package Outline

Access Time (ns)

Temperature

Mark

0°C to 70°C

•

Blank

V61C5181024 Rev. 1.1 July 1998

12 3 4 5 6 7...12

中文翻译

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