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V53C16258SHK50 PDF预览

V53C16258SHK50

更新时间: 2024-11-05 22:21:51
品牌 Logo 应用领域
MOSEL 内存集成电路光电二极管动态存储器
页数 文件大小 规格书
20页 560K
描述
HIGH PERFORMANCE 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH

V53C16258SHK50 技术参数

生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ, SOJ40,.44针数:40
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.83
Is Samacsys:N访问模式:FAST PAGE WITH EDO
最长访问时间:50 ns其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH/SELF REFRESH
I/O 类型:COMMONJESD-30 代码:R-PDSO-J40
长度:26.04 mm内存密度:4194304 bit
内存集成电路类型:EDO DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:40字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ40,.44封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:5 V
认证状态:Not Qualified刷新周期:512
座面最大高度:3.66 mm自我刷新:YES
最大待机电流:0.001 A子类别:DRAMs
最大压摆率:0.09 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

V53C16258SHK50 数据手册

 浏览型号V53C16258SHK50的Datasheet PDF文件第2页浏览型号V53C16258SHK50的Datasheet PDF文件第3页浏览型号V53C16258SHK50的Datasheet PDF文件第4页浏览型号V53C16258SHK50的Datasheet PDF文件第5页浏览型号V53C16258SHK50的Datasheet PDF文件第6页浏览型号V53C16258SHK50的Datasheet PDF文件第7页 
V53C16258H  
PRELIMINARY  
MO SEL VITELIC  
HIGH PERFORMANCE  
256K X 16 EDO PAGE MODE  
CMOS DYNAMIC RAM  
OPTIONAL SELF REFRESH  
HIGH PERFORMANCE  
25  
30  
35  
40  
45  
50  
Max. RAS Access Time, (t  
)
25 ns  
13 ns  
10 ns  
45 ns  
30 ns  
16 ns  
12 ns  
60 ns  
35 ns  
18 ns  
14 ns  
70 ns  
40 ns  
20 ns  
15 ns  
75 ns  
45 ns  
22 ns  
17 ns  
80 ns  
50 ns  
24 ns  
19 ns  
90 ns  
RAC  
Max. Column Address Access Time, (t  
)
CAA  
Min. Extended Data Out Mode Cycle Time, (t  
)
PC  
Min. Read/Write Cycle Time, (t  
)
RC  
Features  
Description  
256K x 16-bit organization  
The V53C16258H is a high speed 262,144 x 16  
bit high performance CMOS dynamic random  
access memory. The V53C16258H offers a  
combination of unique features including: EDO  
Page Mode operation for higher sustained  
bandwidth with Page Mode cycle times as short as  
10ns. All inputs are TTL compatible. Input and  
output capicatance is significantly lowered to  
increase performance and minimize loading. These  
features make the V53C16258H ideally suited for a  
wide variety of high performance computer systems  
and peripheral applications.  
EDO Page Mode for a sustained data rate of  
100 MHz  
RAS access time: 25, 30, 35, 40, 45, 50 ns  
Dual CAS Inputs  
Low power dissipation  
Read-Modify-Write, RAS-Only Refresh,  
CAS-Before-RAS Refresh  
Optional Self Refresh (V53C16258SH)  
Refresh Interval: 512 cycles/8 ms  
Available in 40-pin 400 mil SOJ and 40/44L-pin  
400 mil TSOP-II packages  
Single +5V ±10% Power Supply  
TTL Interface  
Device Usage Chart  
Operating  
Temperature  
Range  
Package Outline  
Access Time (ns)  
Power  
Temperature  
Mark  
K
T
25  
30  
35  
40  
45  
50  
Std.  
0°C to 70°C  
Blank  
I
–40°C to +85°C  
V53C16258H Rev. 3.8 November 1999  
1

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HIGH PERFORMANCE 3.3 VOLT 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH