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V53C16258SLT45 PDF预览

V53C16258SLT45

更新时间: 2024-11-05 22:41:31
品牌 Logo 应用领域
MOSEL 内存集成电路光电二极管动态存储器
页数 文件大小 规格书
20页 158K
描述
HIGH PERFORMANCE 3.3 VOLT 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH

V53C16258SLT45 技术参数

生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2, TSOP40/44,.46,32针数:44
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.83
Is Samacsys:N访问模式:EDO
最长访问时间:45 ns其他特性:RAS ONLY/CAS BEFORE RAS /SELF REFRESH
I/O 类型:COMMONJESD-30 代码:R-PDSO-G40
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:EDO DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:40字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP40/44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE电源:3.3 V
认证状态:Not Qualified刷新周期:512
座面最大高度:1.2 mm自我刷新:YES
最大待机电流:0.0005 A子类别:DRAMs
最大压摆率:0.1 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

V53C16258SLT45 数据手册

 浏览型号V53C16258SLT45的Datasheet PDF文件第2页浏览型号V53C16258SLT45的Datasheet PDF文件第3页浏览型号V53C16258SLT45的Datasheet PDF文件第4页浏览型号V53C16258SLT45的Datasheet PDF文件第5页浏览型号V53C16258SLT45的Datasheet PDF文件第6页浏览型号V53C16258SLT45的Datasheet PDF文件第7页 
V53C16258L  
MOSEL VITELIC  
HIGH PERFORMANCE  
3.3 VOLT 256K X 16 EDO PAGE MODE  
CMOS DYNAMIC RAM  
OPTIONAL SELF REFRESH  
HIGH PERFORMANCE  
35  
40  
45  
50  
Max. RAS Access Time, (t  
)
35 ns  
18 ns  
14 ns  
70 ns  
40 ns  
20 ns  
15 ns  
75 ns  
45 ns  
22 ns  
17 ns  
80 ns  
50 ns  
24 ns  
19 ns  
90 ns  
RAC  
Max. Column Address Access Time, (t  
)
CAA  
Min. Fast Page Mode Cycle Time, (t  
)
PC  
Min. Read/Write Cycle Time, (t  
)
RC  
Features  
Description  
256K x 16-bit organization  
The V53C16258L is a 262,144 x 16 bit high-  
performance CMOS dynamic random access  
memory. The V53C16258L offers Page mode with  
Extended Data Output. An address, CAS and RAS  
input capacitances are reduced to one quarter  
when the x4 DRAM is used to construct the same  
memory density. The V53C16258L has symmetric  
address and accepts 512 cycle 8ms interval.  
EDO Page Mode for a sustained data rate  
of 71 MHz  
RAS access time: 35, 40, 45, 50 ns  
Dual CAS Inputs  
Low power dissipation  
Read-Modify-Write, RAS-Only Refresh,  
CAS-Before-RAS Refresh, and Self Refresh  
Optional Self Refresh (V53C16258SL)  
Refresh Interval: Standard: 512 cycles/8ms  
Available in 40-pin 400 mil SOJ and  
40/44L-pin 400 mil TSOP-II packages  
Single +3.3V ±0.3V Power Supply  
TTL Interface  
All inputs are TTL compatible. EDO Page Mode  
operation allows random access up to 512 x 16 bits,  
within a page, with cycle times as short as 15ns.  
The V53C16258L is ideally suited for a wide  
variety of high performance portable computer  
systems and peripheral applications.  
Device Usage Chart  
Operating  
Temperature  
Range  
Package Outline  
Access Time (ns)  
Power  
Std.  
Temperature  
Mark  
K
T
35  
40  
45  
50  
0°C to 70°C  
Blank  
V53C16258L Rev. 1.1 June 1999  
1

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