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UPD16718NL-XXX PDF预览

UPD16718NL-XXX

更新时间: 2024-11-06 20:06:43
品牌 Logo 应用领域
日电电子 - NEC 驱动接口集成电路
页数 文件大小 规格书
20页 123K
描述
Liquid Crystal Driver, 480-Segment, CMOS, DIE

UPD16718NL-XXX 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE,Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.84数据输入模式:PARALLEL
显示模式:DOT MATRIX接口集成电路类型:LIQUID CRYSTAL DISPLAY DRIVER
JESD-30 代码:X-XUUC-N复用显示功能:YES
功能数量:1区段数:480
最高工作温度:75 °C最低工作温度:-10 °C
封装主体材料:UNSPECIFIED封装代码:DIE
封装形状:UNSPECIFIED封装形式:UNCASED CHIP
认证状态:Not Qualified最大供电电压:3.6 V
最小供电电压:2.5 V标称供电电压:3.3 V
电源电压1-最大:12.5 V电源电压1-分钟:10 V
电源电压1-Nom:11.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL EXTENDED
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

UPD16718NL-XXX 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ PD16718  
480/420-OUTPUT TFT-LCD SOURCE DRIVER  
(COMPATIBLE WITH 64-GRAY SCALES)  
DESCRIPTION  
The µ PD16718 is a source driver for TFT-LCDs capable of dealing with displays with 64-gray scales. Data input  
is based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000  
colors by output of 64 values γ -corrected by an internal D/A converter and 7-by-2 external power modules. Because  
the output dynamic range is as large as VSS2 + 0.1 V to VDD2 – 0.1 V, level inversion operation of the LCD’s common  
electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line  
inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter circuit  
whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a  
maximum clock frequency of 57 MHz when driving at 2.5 V, this driver is applicable to SXGA+/UXGA-standard TFT-  
LCD panels.  
FEATURES  
• CMOS level input (2.5 to 3.6 V)  
• 480/420 Outputs  
• Input of 6 bits (gray scale data) by 6 dots  
• Capable of outputting 64 values by means of 7-by-2 external power modules (14 units) and a D/A converter (R-  
DAC)  
• Logic power supply voltage (VDD1): 2.5 to 3.6 V  
• Driver power supply voltage (VDD2): 10.0 to 12.5 V  
• Output dynamic range VSS2 + 0.1 V to VDD2 – 0.1 V  
• High-speed data transfer: fCLK = 57 MHz (internal data transfer speed when operating at VDD1 = 2.5 V  
• Apply for dot-line inversion, n-line inversion and column line inversion  
• Output Voltage polarity inversion function (POL)  
• Display data inversion function (capable of controlling by each input port) (POL21, POL22)  
• Current consumption control function (LPC)  
• TCP/COF package  
ORDERING INFORMATION  
Part Number  
Package  
µ PD16718N-xxx  
µ PD16718NL-xxx  
TCP (TAB package)  
COF (Chip on Film) package  
Remark Consult an our sales representative regarding the TCP/COF.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. S15423EJ1V0DS00 (1st edition)  
Date Published December 2001 NS CP(K)  
Printed in Japan  
The mark shows major revised points.  
2001  
©

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