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UPA103G-E1

更新时间： 2024-11-23 22:17:15

品牌	Logo	应用领域
日电电子 - NEC		晶体小信号双极晶体管射频小信号双极晶体管放大器
页数	文件大小	规格书
8页	75K
描述
HIGH FREQUENCY NPN TRANSISTOR ARRAY

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中文翻译

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技术参数
数据手册

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UPA103G-E1 技术参数

生命周期：	Obsolete	包装说明：	G14, MINIFLAT-14
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	最大集电极电流 (IC)：	0.04 A
基于收集器的最大容量：	1.8 pF	集电极-发射极最大电压：	6 V
配置：	COMPLEX	JESD-30 代码：	R-CDSO-G14
元件数量：	5	端子数量：	14
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	极性/信道类型：	NPN
认证状态：	Not Qualified	表面贴装：	YES
端子形式：	GULL WING	端子位置：	DUAL
晶体管应用：	AMPLIFIER	晶体管元件材料：	SILICON
标称过渡频率 (fT)：	9000 MHz	Base Number Matches：	1

UPA103G-E1 数据手册

DATA SHEET

COMPOUND TRANSISTOR

µPA103

HIGH FREQUENCY NPN TRANSISTOR ARRAY

FEATURES

•

FIVE MONOLITHIC 9 GHz fT TRANSISTORS:

Two of these use a common emitter pin and can be used as differential amplifiers

OUTSTANDING h^FELINEARITY

•

TWO PACKAGE OPTIONS:

µPA103B: Superior thermal dissipation due to studded ceramic package

µPA103G: Reduced circuit size due to 14-pin plastic SOP package for surface mounting

DESCRIPTION AND APPLICATIONS

The µPA103 is a user configurable Silicon bipolar transistor array consisting of a common emitter pair and three

individual bipolar transistors. It is available in a surface mount 14-pin plastic SOP package and a 14-pin ceramic package.

Typical applications include: differential amplifiers and oscillators, high speed comparators, advanced cellular phone

systems, electro-optic and other signal processing up to 1.5 gigabits/second.

ORDERING INFORMATION

PART NUMBER

µPA103B-E1

µPA103G-E1

PACKAGE

14-pin ceramic package

14-pin plastic SOP (225 mil)

ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)

SYMBOLS

VCBO*

VCEO*

VEBO*

IC*

PARAMETERS

UNITS

RATINGS

Collector to Base Voltage

Collector to Emitter Voltage

Emitter to Base Voltage

Collector Current

2.5

Power Dissipation

µPA103B

650

350

µPA103G

Junction Temperature

µPA103B

°C

200

125

µPA103G

TSTG

Storage Temperature

µPA103B

°C

–55 to +200

–55 to +125

µPA103G

* Absolute maximum ratings for each transistor.

Caution electro-static sensitive devices

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability

and additional information.

Document No. P10708EJ2V0DS00 (2nd edition)

Date Published October 1999 N CP(K)

Printed in Japan

The mark

shows major revised points.

1995, 1999

12 3 4 5 6 7 8

中文翻译

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UPA1424H	NEC	获取价格	Power Bipolar Transistor, 2A I(C), 50V V(BR)CEO, 4-Element, NPN, Silicon, Plastic/Epoxy, 1
UPA1426H	ETC	获取价格	TRANSISTOR \| BJT \| ARRAY \| DARLINGTON \| 80V V(BR)CEO \| 2A I(C) \| SIP
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