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UMC2NT1_06 PDF预览

UMC2NT1_06

更新时间: 2024-10-14 03:23:31
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
10页 86K
描述
Dual Common Base−Collector Bias Resistor Transistors

UMC2NT1_06 数据手册

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UMC2NT1, UMC3NT1,  
UMC5NT1  
Preferred Devices  
Dual Common  
Base−Collector Bias  
Resistor Transistors  
http://onsemi.com  
NPN and PNP Silicon Surface Mount  
Transistors with Monolithic Bias  
Resistor Network  
3
2
1
R1  
R2  
The Bias Resistor Transistor (BRT) contains a single transistor with  
a monolithic bias network consisting of two resistors; a series base  
resistor and a base−emitter resistor. These digital transistors are  
designed to replace a single device and its external resistor bias  
network. The BRT eliminates these individual components by  
integrating them into a single device. In the UMC2NT1 series, two  
complementary BRT devices are housed in the SOT−353 package  
which is ideal for low power surface mount applications where board  
space is at a premium.  
Q2  
R2  
Q1  
R1  
4
5
Features  
MARKING  
DIAGRAM  
Simplifies Circuit Design  
Reduces Board Space  
Reduces Component Count  
5
4
Available in 8 mm, 7 inch/3000 Unit Tape and Reel  
Pb−Free Packages are Available  
SC−88A/SOT−353  
CASE 419A  
STYLE 6  
Ux M G  
G
1
2
3
MAXIMUM RATINGS (T = 25°C unless otherwise noted, common for Q  
A
1
and Q , − minus sign for Q (PNP) omitted)  
2
1
Ux  
x
M
G
= Device Marking  
= 2, 3 or 5  
= Date Code  
= Pb−Free Package  
Rating  
Symbol  
Value  
50  
Unit  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
V
Vdc  
Vdc  
CBO  
V
50  
CEO  
(Note: Microdot may be in either location)  
I
100  
mAdc  
C
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
THERMAL CHARACTERISTICS  
Preferred devices are recommended choices for future use  
Thermal Resistance − Junction-to-Ambient  
(surface mounted)  
R
833  
°C/W  
°C  
and best overall value.  
q
JA  
Operating and Storage Temperature Range  
T , T  
J
65 to  
+150  
stg  
Total Package Dissipation  
P
*150  
mW  
D
@ T = 25°C (Note 1)  
A
1. Device mounted on a FR-4 glass epoxy printed circuit board using the  
minimum recommended footprint.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 6  
UMC2NT1/D  
 

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