Datasheet > UC3584N

UC3584N

更新时间： 2024-02-21 14:48:30

品牌	Logo	应用领域
德州仪器 - TI		开关光电二极管
页数	文件大小	规格书
7页	155K
描述
Secondary Side Synchronous Post Regulator

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UC3584N 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP, DIP16,.3	针数：	16
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	5.66	Is Samacsys：	N
其他特性：	ALSO OPERATES IN CURRENT MODE	模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	VOLTAGE-MODE	控制技术：	PULSE WIDTH MODULATION
最大输入电压：	16 V	最小输入电压：	14 V
标称输入电压：	15 V	JESD-30 代码：	R-PDIP-T16
长度：	19.3 mm	功能数量：	1
端子数量：	16	最高工作温度：	70 °C
最低工作温度：		最大输出电流：	1.5 A
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP16,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	座面最大高度：	5.33 mm
子类别：	Switching Regulator or Controllers	表面贴装：	NO
切换器配置：	BUCK	最大切换频率：	1000 kHz
温度等级：	COMMERCIAL	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
Base Number Matches：	1

UC3584N 数据手册

UC1584

UC2584

UC3584

APPLICATION INFORMATION (cont.)

V_SEC

INTERNAL

SYNC PULSE

C_T

COMP

OUT

UDG-99064

Figure 1. Trailing edge synchronization, leading edge modulation.

Edge Modulation

1. VCC within normal range (UVLO is inactive),

2. No fault condition is detected,

3. C is discharging.

During normal operation the oscillator must be synchro-

nized to the falling edge of the transformer secondary

waveform. Synchronization is achieved by connecting

SYNC to the secondary winding via a resistor divider.

The resistor divider must be chosen to provide a SYNC

pin voltage in excess of 1V at the lowest operating volt-

age on the transformer secondary winding. The UC3584

will generate a narrow internal synchronization pulse

which will synchronize the oscillator to the switching fre-

quency of the main converter.

During the fast charging time of the C capacitor is held

low.

Ultimately, the output of the PWM circuitry controls the

conduction interval of an external N-channel MOSFET

switch in the power supply. The UC3584 employs an

on-board, floating gate driver circuit to interface to the

external switch. An external capacitor connected be-

tween VFLT and SRC acts as a floating power supply for

PWM and Output Driver

The UC3584 employs leading edge modulation tech-

nique to set the required on time of its output. Leading

edge modulation is preferred for secondary side regula-

tion in multiple output converters to prevent ambiguity in

the primary current waveform. In fact, this is the only fea-

sible technique to preserve compatibility with primary

side peak current mode control.

1.E+06

1.E+05

1.E+04

47pF

As Fig. 1 depicts the UC3584 utilizes voltage mode con-

trol to regulate output voltage. The output pulse width

(the on-time of the MOSFET switch) is determined on a

cycle-by-cycle basis by comparing the output of the volt-

age error amplifier and the ramp waveforms across the

timing capacitor. OUT is asserted when the voltage on

COMP exceeds the voltage on CT. There are three more

conditions which must be satisfied to obtain an active

high on the OUT pin. These conditions are:

100pF

470pF

220pF

1000pF

1500pF

1.E+04

1200pF

1.E+03

1.E+05

TIMING RESISTOR (Ohms)

Figure 2. Oscillator frequency vs. R with C as a

parameter.

1 2 3 456 7

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