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UC3610Q PDF预览

UC3610Q

更新时间： 2024-12-01 12:02:03
品牌 Logo 应用领域
德州仪器 - TI 肖特基二极管
页数 文件大小 规格书
13页 647K
描述
DUAL SCHOTTKY DIODE BRIDGE

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中文翻译

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UC3610Q 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：LCC
包装说明：S-PQCC-J20针数：20
Reach Compliance Code：not_compliantHTS代码：8541.10.00.80
风险等级：5.79最小击穿电压：50 V
配置：COMPLEX二极管元件材料：SILICON
二极管类型：BRIDGE RECTIFIER DIODE最大正向电压 (VF)：1.3 V
JEDEC-95代码：MS-018AAJESD-30 代码：S-PQCC-J20
最大非重复峰值正向电流：3 A元件数量：8
相数：1端子数量：20
最高工作温度：70 °C最低工作温度：
最大输出电流：3 A封装主体材料：PLASTIC/EPOXY
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED最大功率耗散：1 W
认证状态：Not Qualified最大重复峰值反向电压：50 V
最大反向电流：1000 µA反向测试电压：40 V
子类别：Other Diodes表面贴装：YES
技术：SCHOTTKY端子形式：J BEND
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

UC3610Q 数据手册

 浏览型号UC3610Q的Datasheet PDF文件第2页浏览型号UC3610Q的Datasheet PDF文件第3页浏览型号UC3610Q的Datasheet PDF文件第4页浏览型号UC3610Q的Datasheet PDF文件第5页浏览型号UC3610Q的Datasheet PDF文件第6页浏览型号UC3610Q的Datasheet PDF文件第7页 
UC1610  
UC3610  
SLUS339B − JUNE 1993 − REVISED DECEMBER 2004  
DUAL SCHOTTKY DIODE BRIDGE  
FEATURES  
DESCRIPTION  
D
D
D
D
D
D
Monolithic Eight-Diode Array  
This eight-diode array is designed for  
Exceptional Efficiency  
Low Forward Voltage  
Fast Recovery Time  
High Peak Current  
Small Size  
high-current, low duty-cycle applications typical of  
flyback voltage clamping for inductive loads. The  
dual bridge connection makes this device  
particularly applicable to bipolar driven stepper  
motors.  
The use of Schottky diode technology features  
high efficiency through lowered forward voltage  
drop and decreased reverse recovery time.  
This single monolithic chip is fabricated in both  
hermetic CERDIP and copper-leaded plastic  
packages. The UC1610 in ceramic is designed for  
−55°C to 125°C environments but with reduced  
peak current capability. The UC2610 in plastic and  
ceramic is designed for −25°C to 125°C  
environments also with reduced peak current  
capability; while the UC3610 in plastic has higher  
current rating over a 0°C to 70°C temperature  
range.  
AVAILABLE OPTIONS  
Packaged Devices  
T
= T  
J
A
SOIC Wide (DW)  
UC1610DW  
DIL (J)  
DIL (N)  
−55°C to 125°C  
−25°C to 125°C  
0°C to 70°C  
UC1610J  
UC2610J  
UC3610J  
UC1610N  
UC2610N  
UC3610N  
UC2610DW  
UC3610DW  
THERMAL INFORMATION  
PACKAGE  
SOIC (DW) 16 pin  
DIP (J) 8 pin  
θja  
θjc  
27  
(1)  
50 − 100  
(2)  
125 − 160  
20  
50  
(1)  
DIP (N) 8 pin  
103  
2
NOTES: 1. Specified θja (junction-to-ambient) is for devices mounted to 5-in FR4 PC board with one ounce copper where noted. When  
2
resistance range is given, lower values are for 5-in aluminum PC board. Test PWB was 0.062 in thick and typically used 0.635-mm  
trace widths for power packages and 1.3-mm trace widths for non-power packages with a 100-mil x 100-mil probe land area at the  
end of each trace.  
2. θjc data values stated were derived from MIL−STD−1835B. MIL−STD−1835B states that the baseline values shown are worst case  
(mean + 2s) for a 60-mil x 60-mil microcircuit device silicon die and applicable for devices with die sizes up to 14400 square mils.  
For device die sizes greater than 14400 square mils use the following values; dual-in-line, 11°C/W; flat pack, 10°C/W; pin grid array,  
10°C/W.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2001, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
www.ti.com  
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