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UC3612J PDF预览

UC3612J

更新时间: 2024-01-19 16:28:19
品牌 Logo 应用领域
德州仪器 - TI 功效测试二极管
页数 文件大小 规格书
3页 74K
描述
SILICON, RECTIFIER DIODE

UC3612J 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:R-GDIP-T8针数:8
Reach Compliance Code:not_compliant风险等级:5.91
其他特性:LOW FORWARD VOLTAGE应用:EFFICIENCY
配置:SEPARATE, 2 ELEMENTS二极管元件材料:SILICON
二极管类型:RECTIFIER DIODE最大正向电压 (VF):1 V
JESD-30 代码:R-GDIP-T8元件数量:2
相数:1端子数量:8
最高工作温度:70 °C最低工作温度:
封装主体材料:CERAMIC, GLASS-SEALED封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
最大功率耗散:1 W认证状态:Not Qualified
最大重复峰值反向电压:50 V最大反向电流:1000 µA
最大反向恢复时间:0.015 µs反向测试电压:40 V
子类别:Other Diodes表面贴装:NO
技术:SCHOTTKY端子形式:THROUGH-HOLE
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

UC3612J 数据手册

 浏览型号UC3612J的Datasheet PDF文件第2页浏览型号UC3612J的Datasheet PDF文件第3页 
UC1612  
UC3612  
Dual Schottky Diode  
FEATURES  
DESCRIPTION  
Monolithic Two Diode Array  
Exceptional Efficiency  
Low Forward Voltage  
Fast Recovery Time  
High Peak Current  
Small Size  
The two-diode array is designed for high-current, low duty-cycle  
applications typical of flyback voltage clamping for inductive loads.  
The use of Schottky diode technology features high efficiency  
through lowered forward voltage drop and decreased reverse recov-  
ery time.  
This single monolithic chip is fabricated in hermetic CERDIP as well  
as copper leaded plastic MINIDIP and SOIC surface mount power  
pack. The UC1612 in ceramic is designed for 55°C to +125°C  
environments, but with reduced peak current capability; while the  
UC3612 has higher current rating over a 0°C to +70°C ambient tem-  
perature range.  
ABSOLUTE MAXIMUM RATINGS  
Peak Inverse Voltage (per diode) . . . . . . . . . . . . . . . . . . . .50V  
Peak Forward Current, UC3612 . . . . . . . . . . . . . . . . . . . . . .3A  
Peak Forward Current, UC1612 . . . . . . . . . . . . . . . . . . . . . .1A  
Storage Temperature Range . . . . . . . . . . . . .65°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . .55°C to +150°C  
Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . .300°C  
Currents are positive into, negative out of the specified terminal.  
Consult Packaging Section of Databook for thermal limitations  
and considerations of packages.  
CONNECTION DIAGRAM  
DIL-8, SOIC-8  
(Top View)  
J, N, or DP Package  
Pins 2, 3, 6, 7 are connected to substrate and must be electrically isolated.  
8/94  

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