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TSM4835CSRL PDF预览

TSM4835CSRL

更新时间: 2024-11-11 06:01:07
品牌 Logo 应用领域
TSC 晶体晶体管开关脉冲光电二极管
页数 文件大小 规格书
4页 175K
描述
30V P-Channel MOSFET

TSM4835CSRL 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-G8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8541.29.00.95风险等级:5.84
Is Samacsys:N其他特性:ULTRA-LOW RESISTANCE
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (ID):9.6 A最大漏源导通电阻:0.018 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-G8
元件数量:1端子数量:8
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:P-CHANNEL最大脉冲漏极电流 (IDM):50 A
认证状态:Not Qualified表面贴装:YES
端子形式:GULL WING端子位置:DUAL
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

TSM4835CSRL 数据手册

 浏览型号TSM4835CSRL的Datasheet PDF文件第2页浏览型号TSM4835CSRL的Datasheet PDF文件第3页浏览型号TSM4835CSRL的Datasheet PDF文件第4页 
Preliminary  
TSM4835  
30V P-Channel MOSFET  
PRODUCT SUMMARY  
SOP-8  
Pin Definition:  
1. Source  
2. Source  
VDS (V)  
RDS(on)(mΩ)  
ID (A)  
-9.6  
3. Source  
4. Gate  
5, 6, 7, 8. Drain  
18 @ VGS = -10V  
30 @ VGS = -4.5V  
-30  
-7.5  
Features  
Block Diagram  
Advance Trench Process Technology  
High Density Cell Design for Ultra Low On-resistance  
Application  
Load Switches  
Desktop PCs  
Notebook PCs  
P-Channel MOSFET  
Ordering Information  
Part No.  
Package  
SOP-8  
Packing  
TSM4835CS RL  
2.5Kpcs / 13” Ree  
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)  
Parameter  
Symbol  
Limit  
-30  
Unit  
Drain-Source Voltage  
VDS  
VGS  
ID  
V
V
A
A
A
Gate-Source Voltage  
±25  
Continuous Drain Current  
Pulsed Drain Current  
Continuous Source Current (Diode Conduction)a,b  
-9.6  
IDM  
IS  
-50  
-2.1  
Ta = 25oC  
Ta = 75oC  
2.5  
Maximum Power Dissipation  
PD  
W
1.6  
Operating Junction Temperature  
TJ  
+150  
- 55 to +150  
oC  
oC  
Operating Junction and Storage Temperature Range  
TJ, TSTG  
Thermal Performance  
Parameter  
Symbol  
RӨJF  
Limit  
18  
Unit  
oC/W  
oC/W  
Junction to Foot (Drain) Thermal Resistance  
Junction to Ambient Thermal Resistance (PCB mounted)  
Notes:  
RӨJA  
39  
a. Pulse width limited by the Maximum junction temperature  
b. Surface Mounted on FR4 Board, t 10 sec.  
1/1  
Version: Preliminary  

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