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TSI400-500IJZ PDF预览

TSI400-500IJZ

更新时间: 2024-11-09 23:38:11
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2页 34K
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Controller Miscellaneous - Datasheet Reference

TSI400-500IJZ 数据手册

 浏览型号TSI400-500IJZ的Datasheet PDF文件第2页 
Tsi400™  
RapidIO-to-PCI/X Bus Bridge  
Features  
The Tsi400 Advantage  
TM  
The Tundra Semiconductor Corporation (Tundra) Tsi400 is a  
RapidIO Interface  
high-performance bus bridge that connects RapidIO devices to  
multi-drop devices based on PCI and PCI-X (see Figure 1). RapidIO is  
a new point-to-point, packet-switched interconnect protocol that meets  
the needs of current and future embedded applications.  
• 250 MHz (4 Gbit/s) or 500 MHz  
(8 Gbit/s)  
• Full-duplex, 8-bit data and 34-bit  
addressing  
• Supports mailbox messages  
An advanced multithread queuing system (MQS) forms the core of the  
Tsi400, as illustrated in Figure 1. The MQS translates RapidIO  
transactions so that devices connected to the PCI/X Interface can  
process them. The MQS performs the same transaction mapping from  
its PCI/X Interface for devices connected directly, or indirectly, to its  
RapidIO Interface.  
RapidIO Interconnect Specification 1.1  
compliant  
PCI/X Interface  
• 50133 MHz on a PCI-X bus  
• 2566 MHz on a PCI bus  
• 32/64-bit data and addressing  
Figure 1: Tsi400 Block Diagram  
Eight  
slave devices  
CompactPCI  
Hot Swap Silicon  
• Transparent and non-transparent modes  
of operation  
• Supports multi-threading (four threads)  
in PCI-X Interface  
Hot Swap  
Controller  
2
I C  
• PCI/X bus arbiter with support for seven  
external masters  
Configuration Registers  
CompactPCI Hot Swap Silicon  
Transparent  
Non-Transparent  
compliant  
PCI Local Bus Specification (Rev. 2.2),  
PCI-X Addendum (Re v .1.0a), and  
PCI-to-PCI Bridge Specification  
(Rev. 1.1) compliant  
Multithread  
Queuing  
System  
The Tsi400 connects RapidIO devices to  
multi-drop devices based on PCI and  
PCI-X.  
Bus  
Arbiter  
Interrupt  
Controller  
Clock  
Drivers  
Other Device Capabilities  
JTAG  
• Supports tunneling of PCI/X transactions  
80A7300_BK001_03  
across a RapidIO switching fabric  
2
• I C/EEPROM Interface  
IEEE1149.1  
boundary scan  
Interrupt  
pins  
Eight  
Seven external  
clock drivers bus masters  
• Interrupt controller that supports  
RapidIO messages and PCI/X interrupts  
When used in combination with a RapidIO switching fabric device,  
such as the Tundra Tsi500 , the Tsi400 provides a seamless  
• JTAG support (Boundary Scan)  
TM  
PCI/X-to-PCI/X connectivity across a RapidIO architecture (see  
Figure 2). Investments in current PCI and PCI-X applications, are  
therefore maintained, while new intra-system interconnects can be  
based on the faster and more reliable, RapidIO technology.  
© 2002 Tundra Semiconductor Corporation.  
Document: 80A7300_FB001_05  
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