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SLLS155A − MAY 2003 − REVISED OCTOBER 2003
D
Fully Supports Provisions of IEEE
D
D
D
Interface to Link-Layer Controller Supports
Low Cost TI Bus-Holder Isolation
1394b-2002 at S100, S100B, S200, S200B,
S400, and S400B Signaling Rates (B
Signifies 1394b Signaling)
Interoperable With Link-Layer Controllers
Using 3.3-V Supplies
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Fully Supports Provisions of IEEE
1394a-2000 and 1394-1995 Standards for
High Performance Serial Bus
Interoperable With Other 1394 Physical
Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V
Supplies
Fully Interoperable With Firewire,
SB1394, DishWire, and i.LINK
Implementation of IEEE Std 1394
D
Low Cost 49.152-MHz Crystal Provides
Transmit and Receive Data at
100/200/400 Mbits/s, and Link-Layer
Controller Clock at 49.152 MHz and
98.304 MHz
Provides Three Fully Backward
Compatible, (1394a-2000 Fully Compliant)
Bilingual 1394b Cable Ports at
D
D
Separate Bias (TPBIAS) for Each Port
400 Megabits per Second (Mbits/s)
Low Cost, High Performance 80-Pin TQFP
(PFP) Thermally Enhanced Package
D
D
Same Three Fully Backward Compatible
Ports Are 1394a-2000 Fully Compliant
Cable Ports at 100/200/400 Mbits/s
D
Software Device Reset (SWR)
D
Fail-Safe Circuitry Senses Sudden Loss of
Power to the Device and Disables the Ports
to Ensure That the TSB41BA3 Does Not
Load the TPBIAS of Any Connected Device
and Blocks Any Leakage From the Port
Back to Power Plane
Full 1394a-2000 Support Includes:
− Connection Debounce
− Arbitrated Short Reset
− Multispeed Concatenation
− Arbitration Acceleration
− Fly-By Concatenation
D
D
The TSB41BA3 Has a 1394a-2000
Compliant Common-Mode Noise Filter on
the Incoming Bias Detect Circuit to Filter
Out Cross-Talk Noise
− Port Disable/Suspend/Resume
− Extended Resume Signaling for
Compatibility With Legacy DV Devices
D
D
D
D
Power-Down Features to Conserve Energy
in Battery Powered Applications
Cable/Transceiver Hardware Speed and
Port Mode Are Selectable by Pin States
− Supports Connection to CAT5 Cable
Transceiver by Allowing Ports to be
Forced to Beta-Only 100 Mbits/s only
− Supports Connection to S200 Plastic
Optical Fiber Transceivers by Allowing
Ports to be Forced to1394b Beta-Only
200 Mbits/s and S100 Mbits/s Only
− Supports Use of 1394a Connections by
Allowing Ports 1 and 2 to Be Forced to
1394a-Only Mode
Low-Power Sleep Mode
Automotive Sleep Mode Support
Fully Compliant With Open Host Controller
Interface (HCI) Requirements
D
Cable Power Presence Monitoring
D
Cable Ports Monitor Line Conditions for
Active Connection to Remote Node
D
D
Register Bits Give Software Control of
Contender Bit, Power Class Bits, Link
Active Control Bit, and 1394a-2000
Features
− Optical Signal Detect Input for All Ports
in Beta Mode Enables Connection to
Optical Transceivers
Data Interface to Link-Layer Controller Pin
Selectable From 1394a-2000 Mode (2/4/8
Parallel Bits at 49.152 MHz) or 1394b Mode
(8 Parallel Bits at 98.304 MHz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.
i.LINK is a trademark of Sony Corporation.
FireWire is a trademark of Apple Computer Incorporated.
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Copyright 2003, Texas Instruments Incorporated
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