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TSB41BA3AIGGM PDF预览

TSB41BA3AIGGM

更新时间: 2024-01-05 11:59:25
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
66页 891K
描述
IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER

TSB41BA3AIGGM 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:TFQFP, TQFP80,.55SQ针数:80
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.72
差分输出:YES驱动器位数:6
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:IEEE 1394JESD-30 代码:S-PQFP-G80
长度:12 mm功能数量:6
端子数量:80最高工作温度:110 °C
最低工作温度:-40 °C最小输出摆幅:0.172 V
最大输出低电流:0.004 A封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装等效代码:TQFP80,.55SQ
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE, FINE PITCH
电源:1.8,3.3 V认证状态:Not Qualified
最大接收延迟:接收器位数:6
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大供电电压:1.95 V最小供电电压:1.75 V
标称供电电压:1.85 V电源电压1-最大:3.6 V
电源电压1-分钟:3 V电源电压1-Nom:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:12 mmBase Number Matches:1

TSB41BA3AIGGM 数据手册

 浏览型号TSB41BA3AIGGM的Datasheet PDF文件第2页浏览型号TSB41BA3AIGGM的Datasheet PDF文件第3页浏览型号TSB41BA3AIGGM的Datasheet PDF文件第4页浏览型号TSB41BA3AIGGM的Datasheet PDF文件第5页浏览型号TSB41BA3AIGGM的Datasheet PDF文件第6页浏览型号TSB41BA3AIGGM的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃꢄ ꢂꢅ ꢆꢅ  
ꢇ ꢈ ꢈꢈ ꢄ ꢆ ꢉ ꢃ ꢊ ꢀ ꢋꢌꢈꢈ ꢍꢎꢏ ꢌꢀ ꢐꢅꢂ ꢑꢈ ꢀ ꢌꢅꢒꢁ ꢐꢈꢇ ꢓꢈꢌ ꢔꢅ ꢌ ꢂꢇ ꢀ ꢈꢌ  
SLLS618B − JUNE 2004 − REVISED AUGUST 2004  
D
Fully Supports Provisions of IEEE  
D
Interface to Link-Layer Controller Supports  
Low Cost Texas Instruments Bus-Holder  
Isolation  
1394b-2002 at S100, S100B, S200, S200B,  
S400, and S400B Signaling Rates (B  
Signifies 1394b Signaling)  
D
D
Interoperable With Link-Layer Controllers  
Using 3.3-V Supplies  
D
D
D
Fully Supports Provisions of IEEE  
1394a-2000 and 1394-1995 Standards for  
High Performance Serial Bus  
Interoperable With Other 1394 Physical  
Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V  
Supplies  
Fully Interoperable With Firewire,  
DTVLink, SB1394, DishWire, and  
i.LINKImplementation of IEEE Std 1394  
Provides Three Fully Backward  
Compatible, (1394a-2000 Fully Compliant)  
Bilingual 1394b Cable Ports at  
D
Low Cost 49.152-MHz Crystal Provides  
Transmit and Receive Data at  
100/200/400 Mbits/s and Link-Layer  
Controller Clock at 49.152 MHz and  
98.304 MHz  
400 Megabits per Second (Mbits/s)  
D
D
Separate Bias (TPBIAS) for Each Port  
D
D
Same Three Fully Backward Compatible  
Ports Are 1394a-2000 Fully Compliant  
Cable Ports at 100/200/400 Mbits/s  
Low Cost, High Performance 80-Pin TQFP  
(PFP) Thermally Enhanced Package  
D
Software Device Reset (SWR)  
Full 1394a-2000 Support Includes:  
− Connection Debounce  
− Arbitrated Short Reset  
− Multispeed Concatenation  
− Arbitration Acceleration  
− Fly-By Concatenation  
− Port Disable/Suspend/Resume  
− Extended Resume Signaling for  
Compatibility With Legacy DV Devices  
D
Fail-Safe Circuitry Senses Sudden Loss of  
Power to the Device and Disables the Ports  
to Ensure That the TSB41BA3A Does Not  
Load the TPBIAS of Any Connected Device  
and Blocks Any Leakage From the Port  
Back to Power Plane  
D
The TSB41BA3A Has a 1394a-2000  
Compliant Common-Mode Noise Filter on  
the Incoming Bias Detect Circuit to Filter  
Out Cross-Talk Noise  
D
D
D
Power-Down Features to Conserve Energy  
in Battery Powered Applications  
D
D
Cable/Transceiver Hardware Speed and  
Port Mode Are Selectable by Pin States  
Low-Power Automotive Sleep Mode  
Support  
Supports Connection to CAT5 Cable  
Transceiver by Allowing Ports to be Forced  
to Beta-Only 100 Mbits/s only  
Fully Compliant With Open Host Controller  
Interface (OHCI) Requirements  
D
Cable Power Presence Monitoring  
D
Supports Connection to S200 Plastic  
Optical Fiber Transceivers by Allowing  
Ports to be Forced to 1394b Beta-Only  
200 Mbits/s and S100 Mbits/s Only  
D
Cable Ports Monitor Line Conditions for  
Active Connection to Remote Node  
D
D
Register Bits Give Software Control of  
Contender Bit, Power Class Bits, Link  
Active Control Bit, and 1394a-2000  
Features  
D
D
Optical Signal Detect Input for All Ports in  
Beta Mode Enables Connection to Optical  
Transceivers  
Data Interface to Link-Layer Controller Pin  
Selectable From 1394a-2000 Mode (2/4/8  
Parallel Bits at 49.152 MHz) or 1394b Mode  
(Eight Parallel Bits at 98.304 MHz)  
Supports Use of 1394a Connectors by  
Allowing Ports 1 and 2 to Be Forced to  
1394a-Only Mode  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.  
i.LINK is a trademark of Sony Corporation.  
FireWire is a trademark of Apple Computer Incorporated.  
ꢀꢢ  
Copyright 2004, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢫ ꢚꢙ ꢝ ꢤꢤ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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