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TSB41BA3B PDF预览

TSB41BA3B

更新时间: 2024-11-24 03:26:19
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
67页 1120K
描述
IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER

TSB41BA3B 数据手册

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ꢀ ꢁꢂ ꢃꢄ ꢂꢅ ꢆꢂ  
ꢇ ꢈ ꢈꢈ ꢄ ꢆ ꢉ ꢃ ꢊ ꢀ ꢋꢌꢈꢈ ꢍꢎꢏ ꢌꢀ ꢐꢅꢂ ꢑꢈ ꢀ ꢌꢅꢒꢁ ꢐꢈꢇ ꢓꢈꢌ ꢔꢅ ꢌ ꢂꢇ ꢀ ꢈꢌ  
SLLS678 − SEPTEMBER 2005  
D
Fully Supports Provisions of IEEE  
D
Data Interface to Link-Layer Controller  
Terminal-Selectable From 1394a-2000 Mode  
(2/4/8 Parallel Bits at 49.152 MHz) or 1394b  
Mode (Eight Parallel Bits at 98.304 MHz)  
1394b-2002 at S100, S100B, S200, S200B,  
S400, and S400B Signaling Rates (B  
Signifies IEEE 1394b Signaling)  
D
D
D
Fully Supports Provisions of IEEE  
1394a-2000 and 1394-1995 Standards for  
High-Performance Serial Bus  
D
D
Interoperable With Link-Layer Controllers  
Using 3.3-V Supplies  
Interoperable With Other 1394 Physical  
Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V  
Supplies  
Fully Interoperable With Firewire,  
DTVLink, SB1394, DishWire, and i.LINK  
Implementation of IEEE Std 1394  
D
Low-Cost 49.152-MHz Crystal Provides  
Transmit and Receive Data at  
100/200/400 Mbps and Link-Layer  
Controller Clock at 49.152 MHz and  
98.304 MHz  
Provides Three Fully Backward-  
Compatible, (1394a-2000 Fully Compliant)  
Bilingual 1394b Cable Ports at  
400 Megabits per Second (Mbps)  
D
D
Same Three Fully Backward-Compatible  
Ports Are 1394a-2000 Fully Compliant  
Cable Ports at 100/200/400 Mbps  
D
D
Separate Bias (TPBIAS) for Each Port  
Low-Cost, High-Performance 80-Terminal  
TQFP (PFP) Thermally Enhanced Package  
Full 1394a-2000 Support Includes:  
− Connection Debounce  
− Arbitrated Short Reset  
− Multispeed Concatenation  
− Arbitration Acceleration  
− Fly-By Concatenation  
− Port Disable/Suspend/Resume  
− Extended Resume Signaling for  
Compatibility With Legacy DV Devices  
D
Software Device Reset (SWR)  
D
Fail-Safe Circuitry Senses Sudden Loss of  
Power to the Device and Disables the Ports  
to Ensure That the TSB41BA3B Does Not  
Load the TPBIAS of Any Connected Device  
and Blocks Any Leakage From the Port  
Back to Power Plane.  
D
D
D
D
1394a-2000-Compliant, Common-Mode  
Noise Filter on the Incoming Bias Detect  
Circuit to Filter Out Crosstalk Noise  
D
D
D
Power-Down Features to Conserve Energy  
in Battery-Powered Applications  
Cable/Transceiver Hardware Speed and  
Port Mode Are Selectable by Terminal  
States  
Low-Power Automotive Sleep Mode  
Support  
Fully Compliant With Open Host Controller  
Interface (OHCI) Requirements  
Supports Connection to CAT5 Cable  
Transceiver by Allowing Ports to be Forced  
to Beta-Only, 100-Mbps-Only  
D
Cable Power Presence Monitoring  
D
Cable Ports Monitor Line Conditions for  
Active Connection to Remote Node  
Supports Connection to S200 Plastic  
Optical Fiber Transceivers by Allowing  
Ports to be Forced to 1394b Beta-Only,  
S200-Mbps-Only, and S100-Mbps-Only  
D
D
Register Bits Give Software Control of  
Contender Bit, Power Class Bits, Link  
Active Control Bit, and 1394a-2000  
Features  
D
D
Optical Signal Detect Input for All Ports in  
Beta Mode Enables Connection to Optical  
Transceivers  
Interface to Link-Layer Controller Supports  
Low-Cost Texas Instruments Bus-Holder  
Isolation  
Supports Use of 1394a Connectors by  
Allowing Ports 1 and 2 to Be Forced to  
1394a-Only Mode  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.  
i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation.  
MicroStar BGA and PowerPAD are trademarks of Texas Instruments.  
Other trademarks are the property of their respective owners.  
FireWire is a trademark of Apple Computer, Inc.  
ꢀꢢ  
Copyright 2005, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢫ ꢚꢙ ꢝ ꢤꢤ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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