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TMS5703134APGEQQ1 PDF预览

TMS5703134APGEQQ1

更新时间： 2024-10-28 11:58:23
品牌 Logo 应用领域
德州仪器 - TI 闪存微控制器
页数 文件大小 规格书
155页 2867K
描述
TMS570LSxxx4 16/32-Bit RISC Flash Microcontroller

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TMS5703134APGEQQ1 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP,针数：144
Reach Compliance Code：unknownECCN代码：3A001.A.3
HTS代码：8542.31.00.01风险等级：5.84
具有ADC：YES其他特性：ALSO OPERATES AT 3.3 V NOMINAL I/O SUPPLY
地址总线宽度：位大小：32
最大时钟频率：80 MHzDAC 通道：NO
DMA 通道：YES外部数据总线宽度：
JESD-30 代码：S-PQFP-G144长度：20 mm
I/O 线路数量：4端子数量：144
最高工作温度：105 °C最低工作温度：-40 °C
PWM 通道：YES封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCHROM可编程性：FLASH
筛选级别：AEC-Q100座面最大高度：1.6 mm
速度：160 MHz最大供电电压：1.32 V
最小供电电压：1.14 V标称供电电压：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
宽度：20 mmuPs/uCs/外围集成电路类型：MICROCONTROLLER, RISC
Base Number Matches：1

TMS5703134APGEQQ1 数据手册

 浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第2页浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第3页浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第4页浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第5页浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第6页浏览型号TMS5703134APGEQQ1的Datasheet PDF文件第7页 
TMS570LS3134  
TMS570LS2134  
TMS570LS2124  
www.ti.com  
SPNS165–SEPTEMBER 2011  
TMS570LSxxx4 16/32-Bit RISC Flash Microcontroller  
Check for Samples: TMS570LS3134  
1 TMS570LSxxx4 16/32-Bit RISC Flash Microcontroller  
1.1 Features  
1
• High-Performance Microcontroller for Safety  
• Multiple Communication Interfaces  
– 10/100 Mbps Ethernet MAC (EMAC)  
Critical Applications  
– Dual CPU’s running in lockstep  
– ECC on flash and RAM interfaces  
•
•
IEEE 802.3 compliant (3.3V-I/O only)  
Supports MII and MDIO  
– Built-In Self Test for CPU and on-chip RAMs  
– Error Signaling Module with Error Pin  
– Voltage and Clock Monitoring  
– Three CAN Controllers (DCAN)  
•
•
64 mailboxes with parity protection each  
Compliant to CAN protocol version 2.0B  
– Inter-Integrated Circuit (I2C)  
• ARM® Cortex™ – R4F 32-bit RISC CPU  
– Efficient 1.6DMIPS/MHz with 8-stage pipeline  
– Three Multi-buffered Serial Peripheral  
– Floating-Point Unit with Single/Double  
Interfaces (MibSPI)  
Precision  
•
128 Words with Parity Protection each  
– 12-Region Memory Protection Unit  
– Open Architecture with 3rd Party Support  
• Operating Conditions  
– Two Standard Serial Peripheral Interfaces  
(SPI)  
– Local Interconnect Network Interface (LIN)  
Controller  
– Up to 180MHz System Clock  
•
Compliant to LIN protocol version 2.1  
– Core Supply Voltage (VCC): 1.2V nominal  
– I/O Supply Voltage (VCCIO): 3.3V nominal  
• Integrated Memory  
– Up to 3MB Program Flash with ECC  
– Up to 256KB RAM with ECC  
– 64KB Flash for emulated EEPROM  
• 16- bit External Memory Interface  
• Common Platform Architecture  
– Consistent memory map across family  
– Real-Time Interrupt Timer (RTI) OS Timer  
– 96-channel Vectored Interrupt Module (VIM)  
– 2-channel Cyclic Redundancy Checker (CRC)  
• Direct Memory Access (DMA) Controller  
– 16 Channels and 32 Control Packets  
– Parity protection for control packet RAM  
– DMA Accesses Protected by Dedicated MPU  
– Standard Serial Communication Interface  
(SCI)  
• Two High-End Timer Modules (N2HET)  
– N2HET1: 32 programmable channels  
– N2HET2: 20 programmable channels  
– 160 Word Instruction RAM with parity  
protection each  
– Each includes Hardware Angle Generator  
– Dedicated Transfer Unit for each N2HET  
(HTU)  
• Two 10/12-bit Multi-Buffered ADC Modules  
– ADC1: 24 channels  
– ADC2: 16 channels  
– 16 shared channels  
– 64 result buffers with parity protection each  
• Packages  
• Frequency-Modulated Phase-Locked-Loop  
(FMPLL) with Built-In Slip Detector  
• Separate Non-Modulating PLL  
– 144-pin Quad Flatpack (PGE) [Green]  
– 337-Ball Grid Array (ZWT) [Green]  
• IEEE 1149.1 JTAG, Boundary Scan and ARM  
CoreSight Components  
• JTAG Security Module  
• Trace and Calibration Capabilities  
– Embedded Trace Macrocell (ETM-R4)  
– Data Modification Module (DMM)  
– RAM Trace Port (RTP)  
– Parameter Overlay Module (POM)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCT PREVIEW information concerns products in the formative  
Copyright © 2011, Texas Instruments Incorporated  
or design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right  
to change or discontinue these products without notice.  
 
 
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