5秒后页面跳转
TMS320TCI6489GUN PDF预览

TMS320TCI6489GUN

更新时间: 2024-10-27 12:58:51
品牌 Logo 应用领域
德州仪器 - TI 数字信号处理器通信
页数 文件大小 规格书
197页 1481K
描述
暂无描述

TMS320TCI6489GUN 数据手册

 浏览型号TMS320TCI6489GUN的Datasheet PDF文件第2页浏览型号TMS320TCI6489GUN的Datasheet PDF文件第3页浏览型号TMS320TCI6489GUN的Datasheet PDF文件第4页浏览型号TMS320TCI6489GUN的Datasheet PDF文件第5页浏览型号TMS320TCI6489GUN的Datasheet PDF文件第6页浏览型号TMS320TCI6489GUN的Datasheet PDF文件第7页 
TMS320TCI6489  
www.ti.com  
SPRS626BNOVEMBER 2009REVISED APRIL 2011  
TMS320TCI6489 Communications Infrastructure Digital Signal Processor  
1 Features  
12  
Up to 64 Macro-BTS Users  
Key Features  
Up to 160 km cell size  
High-Performance Communications  
Infrastructure DSP (TCI6489)  
Six RSAs for CDMA Processing (2 per core)  
1.18-ns Instruction Cycle Time  
850-MHz Clock Rate  
0°C to 100°C Commercial Temperature  
Dedicated RAKE, PATH_SEARCH and  
RACH_SEARCH Instructions  
Transmit Processing Capability  
Enhanced VCP2  
3 TMS320C64x+DSP Cores; Six RSAs for  
CDMA Processing (2 per core)  
One Receive Accelerator (RAC)  
Enhanced VCP2/TCP2  
Supports Over 694 7.95-Kbps AMR  
Enhanced Turbo Decoder Coprocessor (TCP2)  
Supports up to Eight 2-Mbps 3 GPP  
(6 Iterations)  
Endianness: Little Endian, Big Endian  
Frame Synchronization Interface  
Frame Synchronization Interface  
16-/32-Bit DDR2-667 Memory Controller  
EDMA3 Controller  
Time Alignment Between Internal  
Subsystems, External Devices/System  
OBSAI RP1 Compliant for Frame Burst Data  
Antenna Interface  
One 1.8-V Inter-Integrated Circuit (I2C) Bus  
Two 1.8-V McBSPs  
1000 Mbps Ethernet MAC (EMAC)  
Six 64-Bit General-Purpose Timers  
16 General-Purpose I/O (GPIO) Pins  
Internal Semaphore Module  
System PLL and PLL Controller/DDR PLL  
and PLL Controller, Dedicated to DDR2  
Memory Controller  
Alternate Interfaces for non-RP1 and  
non-UMTS Systems  
16-/32-Bit DDR2-667 Memory Controller  
EDMA3 Controller (64 Independent Channels)  
Antenna Interface  
4 Configurable Links (Full Duplex)  
Supports OBSAI RP3 Protocol, v1.0:  
768-Mbps, 1.536-, 3.072-Gbps Link Rates  
Supports CPRI Protocol V2.0: 614.4-Mbps,  
1.2288-, 2.4576-Gbps Link Rates  
Clock Input Independent or Shared with CPU  
High-Performance Communications  
Infrastructure DSP (TCI6489)  
1.18-ns Instruction Cycle Time  
850-MHz Clock Rate  
(Selectable at Boot-Time)  
One 1.8-V Inter-Integrated Circuit (I2C) Bus  
Two 1.8-V McBSPs  
1000 Mbps Ethernet MAC (EMAC)  
IEEE 802.3 Compliant  
Eight 32-Bit Instructions/Cycle  
0°C to 100°C Commercial Temperature  
3 TMS320C64x+DSP Cores  
Dedicated SPLOOP Instructions  
Compact Instructions (16-Bit)  
Exception Handling  
Supports SGMII, v1.8 Compliant  
8 Independent Transmit (TX) and 8  
TMS320C64x+ Megamodule L1/L2 Memory  
Independent Receive (RX) Channels  
Architecture  
256 K-Bit (32 K-Byte) L1P Program Cache  
[Direct Mapped]  
256 K-Bit (32 K-Byte) L1D Data Cache  
[2-Way Set-Associative]  
24 M-Bit (3072 K-Byte) Total L2 Unified  
Six 64-Bit General-Purpose Timers  
Configurable up to Twelve 32-Bit Timers  
Configurable in a Watchdog Timer mode  
16 General-Purpose I/O (GPIO) Pins  
Internal Semaphore Module  
Mapped RAM/Cache  
Software Method to Control Access to  
Shared Resources  
32 General Purpose Semaphore Resources  
System PLL and PLL Controller  
512 K-Bit (64 K-Byte) L3 ROM  
One Receive Accelerator (RAC)  
Performs Chip-Rate RX Functions  
DDR PLL and PLL Controller, Dedicated to  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCT PREVIEW information concerns products in the formative  
or design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right  
to change or discontinue these products without notice.  
Copyright © 2009–2011, Texas Instruments Incorporated  
 

与TMS320TCI6489GUN相关器件

型号 品牌 获取价格 描述 数据表
TMS320TCI6602 TI

获取价格

Multicore Fixed and Floating-Point Digital Signal Processor
TMS320TCI6604 TI

获取价格

Multicore Fixed and Floating-Point Digital Signal Processor
TMS320TCI6608 TI

获取价格

Multicore Fixed and Floating-Point Digital Signal Processor
TMS320TCI6612 TI

获取价格

Communications Infrastructure KeyStone SoC
TMS320TCI6612XCMSA2 TI

获取价格

Communications Infrastructure KeyStone SoC
TMS320TCI6614 TI

获取价格

Communications Infrastructure KeyStone SoC
TMS320TCI6616 TI

获取价格

Communications Infrastructure KeyStone SoC
TMS320TCI6618 TI

获取价格

Communications Infrastructure KeyStone SoC
TMS320TEST TI

获取价格

DVCPro50 Decoder (v01.01.00) on TMS320C6678
TMS320TEST1000 TI

获取价格

DVCPro50 Decoder (v01.01.00) on TMS320C6678