Datasheet > 微控制器和处理器 > 串行 IO/通信控制器> TL16CP554APM

TL16CP554APM

更新时间： 2024-11-22 12:27:39

品牌	Logo	应用领域
德州仪器 - TI		微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输 PC 时钟
页数	文件大小	规格书
46页	1074K
描述
ASYNCHRONOUS-COMMUNICATIONS ELEMENT

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TL16CP554APM 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFP
包装说明：	LFQFP, QFP64,.47SQ,20	针数：	64
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.69
Samacsys Confidence：		Samacsys Status：	Released
Samacsys PartID：	607221	Samacsys Pin Count：	64
Samacsys Part Category：	Integrated Circuit	Samacsys Package Category：	Other
Samacsys Footprint Name：	QFP50P1200X1200X160-64N	Samacsys Released Date：	2017-01-12 12:59:53
Is Samacsys：	N	其他特性：	ALSO OPERATES AT 5 V SUPPLY
地址总线宽度：	3	边界扫描：	NO
最大时钟频率：	16 MHz	通信协议：	ASYNC, BIT
数据编码/解码方法：	NRZ	最大数据传输速率：	0.125 MBps
外部数据总线宽度：	8	JESD-30 代码：	S-PQFP-G64
JESD-609代码：	e4	长度：	10 mm
低功率模式：	NO	湿度敏感等级：	3
串行 I/O 数：	4	端子数量：	64
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装等效代码：	QFP64,.47SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	3.3/5 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	子类别：	Serial IO/Communication Controllers
最大压摆率：	50 mA	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	10 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：	1

TL16CP554APM 数据手册

TL16C554A, TL16C554AI

ASYNCHRONOUS-COMMUNICATIONS ELEMENT

ꢀ

ꢀꢀ

SLLS509E − AUGUST 2001 − REVISED JUNE 2010

Integrated Asynchronous-Communications

Element

Fully Programmable Serial Interface

Characteristics:

− 5-, 6-, 7-, or 8-Bit Characters

− Even-, Odd-, or No-Parity Bit

− 1-, 1 1/2-, or 2-Stop Bit Generation

− Baud Generation (DC to 1-Mbit Per

Second)

Consists of Four Improved TL16C550C

ACEs Plus Steering Logic

In FIFO Mode, Each ACE Transmitter and

Receiver Is Buffered With 16-Byte FIFO to

Reduce the Number of Interrupts to CPU

False Start Bit Detection

In TL16C450 Mode, Hold and Shift

Registers Eliminate Need for Precise

Synchronization Between the CPU and

Serial Data

Complete Status Reporting Capabilities

Line Break Generation and Detection

Internal Diagnostic Capabilities:

− Loopback Controls for Communications

Link Fault Isolation

− Break, Parity, Overrun, Framing Error

Simulation

Up to 16-MHz Clock Rate for up to 1-Mbaud

Operation with V = 3.3 V and 5 V

Programmable Baud-Rate Generators

Which Allow Division of Any Input

Reference Clock by 1 to (2 ꢀ−ꢀ1) and

Fully Prioritized Interrupt System Controls

Generate an Internal 16 × Clock

Modem Control Functions (CTS, RTS, DSR,

DTR, RI, and DCD)

Adds or Deletes Standard Asynchronous

Communication Bits (Start, Stop, and

Parity) to or From the Serial-Data Stream

3-State Outputs Provide TTL Drive

Capabilities for Bidirectional Data Bus and

Control Bus

Independently Controlled Transmit,

Receive, Line Status, and Data Set

Interrupts

Programmable Auto-RTS and Auto-CTS

CTS Controls Transmitter in Auto-CTS

Mode,

5-V and 3.3-V Operation

RCV FIFO Contents and Threshold Control

RTS in Auto-RTS Mode,

description

The TL16C554A is an enhanced quadruple version of the TL16C550C asynchronous-communications element

(ACE). Each channel performs serial-to-parallel conversion on data characters received from peripheral

devices or modems and parallel-to-serial conversion on data characters transmitted by the CPU. The complete

status of each channel of the quadruple ACE can be read by the CPU at any time during operation. The

information obtained includes the type and condition of the operation performed and any error conditions

encountered.

The TL16C554A quadruple ACE can be placed in an alternate FIFO mode, which activates the internal FIFOs

to allow 16 bytes (plus three bits of error data per byte in the receiver FIFO) to be stored in both receive and

transmit modes. In the FIFO mode of operation, there is a selectable autoflow control feature that can

significantly reduce software overhead and increase system efficiency by automatically controlling serial-data

flow using RTS output and CTS input signals. All logic is on the chip to minimize system overhead and maximize

system efficiency. Two terminal functions allow signaling of direct-memory access (DMA) transfers. Each ACE

includes a programmable baud-rate generator that can divide the timing reference clock input by a divisor

between 1 and 2 −1.

The TL16C554A is available in a 68-pin plastic-leaded chip-carrier (PLCC) FN package, 64-pin plastic quad

flatpack (PQFP) PM package and in an 80-pin (TQFP) PN package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...46

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TL16CP554APM 替代型号

型号	品牌	替代类型	描述	数据表
TL16CP554AIPM	TI	类似代替	ASYNCHRONOUS-COMMUNICATIONS ELEMENT
ST16C654DCQ64-F	EXAR	功能相似	Serial I/O Controller, 4 Channel(s), 0.1875MBps, CMOS, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT,
TL16C554AIFNR	TI	功能相似	ASYNCHRONOUS-COMMUNICATIONS ELEMENT

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