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TL16PIR552PHL PDF预览

TL16PIR552PHL

更新时间: 2024-09-10 21:06:43
品牌 Logo 应用领域
德州仪器 - TI 通信数据传输外围集成电路
页数 文件大小 规格书
52页 692K
描述
2 CHANNEL(S), 1Mbps, SERIAL COMM CONTROLLER, PQFP80

TL16PIR552PHL 技术参数

生命周期:Obsolete包装说明:QFP,
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.82地址总线宽度:3
边界扫描:NO通信协议:ASYNC, BIT
数据编码/解码方法:NRZ最大数据传输速率:0.125 MBps
外部数据总线宽度:8JESD-30 代码:R-PQFP-G80
长度:20 mm低功率模式:NO
DMA 通道数量:I/O 线路数量:8
串行 I/O 数:2端子数量:80
片上数据RAM宽度:最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:RECTANGULAR
封装形式:FLATPACK认证状态:Not Qualified
RAM(字数):0座面最大高度:3.1 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:MOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:14 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

TL16PIR552PHL 数据手册

 浏览型号TL16PIR552PHL的Datasheet PDF文件第2页浏览型号TL16PIR552PHL的Datasheet PDF文件第3页浏览型号TL16PIR552PHL的Datasheet PDF文件第4页浏览型号TL16PIR552PHL的Datasheet PDF文件第5页浏览型号TL16PIR552PHL的Datasheet PDF文件第6页浏览型号TL16PIR552PHL的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢇꢈ  
ꢉꢊꢋ ꢁ ꢊꢋꢆ ꢀ ꢌ ꢅꢀ ꢍ ꢉꢊꢋ ꢁ ꢅ ꢎ ꢉꢋ ꢋ ꢏꢉ  
ꢂ ꢈ ꢐ ꢑ ꢄꢋꢆꢋ ꢁꢁ ꢒ ꢁ ꢄ ꢓ ꢆꢀ  
SLLS222A − DECEMBER 1995 − REVISED AUGUST 1996  
D
D
Dual TL16C550C Universal Asynchronous  
Receiver/Transmitters (UARTs)  
D
D
Programmable Baud-Rate Generator  
Allows Division of Any Input Reference  
Clock by 1 to (2 −1) and Generates an  
16  
IEEE 1284 Bidirectional Parallel Data (PD)  
Port  
− Compatible With Standard Centronics  
Parallel Interface  
− Support for Parallel Protocols: Extended  
Capability Port (ECP) and Enhanced  
Parallel Port (EPP)  
− Data Path 16-Byte FIFO Buffer  
− Direct Memory Access (DMA) Transfer  
− Decompression of Run Length Encoded  
Data in ECP Reverse Mode  
Internal 16× Clock  
Adds or Deletes Standard Asynchronous  
Communication Bits (Start, Stop, and  
Parity) to or From the Serial Data Stream  
D
D
On-Board Prescaler With Programmable  
Divisor Values From 0 to 33  
Independent Control of Transmit, Receive,  
Line Status, and Data-Set Interrupts on  
Each Channel  
D
Fully Programmable Serial-Interface  
Characteristics:  
− 5-, 6-, 7-, or 8-Bit Characters  
− Even-, Odd-, or No-Parity Bit Generation  
and Detection  
− 1-, 1 1/2-, or 2-Stop Bit Generation  
− Baud Generation (DC to 1 Mbit Per  
Second)  
− Direct Connection to Printer, No External  
Transceiver is Needed  
D
Serial Ports Have Infrared Data Association  
(IrDA) Inputs and Outputs  
− 1200 bps to 115.2 kbps Data Rate  
D
D
16-Byte FIFOs Reduce CPU Interrupts  
12 mA Drive Current for All 1284 Control  
Terminals and Parallel Port Data Terminals  
D
D
D
False Start-Bit Detection  
Complete Status Reporting Capabilities  
D
D
D
D
D
Programmable Auto Flow Control on the  
UARTs  
3-State Output TTL Drive Capabilities for  
Bidirectional Data Bus and Control Bus  
Capable of Running With All Existing  
TL16C450 Software  
D
Line Break Generation and Detection  
D
Internal Diagnostic Capabilities:  
− Loopback Controls for Communications  
Link-Fault Isolation  
− Break, Parity, Overrun, and Framing  
Error Simulation  
After Reset, All Registers Are Identical to  
the TL16C450 Register Set  
Up to 16-MHz Clock Rate for Up to 1-Mbaud  
Operation  
In the TL16C450 Mode, Hold and Shift  
Registers Eliminate the Need for Precise  
Synchronization Between the CPU and  
Serial Data  
D
D
D
Fully Prioritized Interrupt System Controls  
Modem-Control Functions (CTS, RTS, DSR,  
DTR, RI, and DCD)  
Available in 80-Pin Quad Flatpack (QFP)  
Package  
description  
The TL16PIR552 has a dual-channel universal asynchronous receiver/transmitter (UART). The UART is similar  
to the TL16C550C. The device serves two serial input/output ports simultaneously in microcomputer or  
microprocessor-based systems. Each channel performs serial-to-parallel conversion on data characters  
received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitted  
by the CPU. The complete status of each channel of the dual UART can be read by the CPU at any time during  
functional operation. The information obtained includes the type and condition of the transfer operation being  
performed and the error condition.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢟ  
Copyright 1996, Texas Instruments Incorporated  
ꢛ ꢟ ꢜ ꢛꢕ ꢖꢩ ꢘꢗ ꢚ ꢢꢢ ꢠꢚ ꢎ ꢚ ꢙ ꢟ ꢛ ꢟ ꢎ ꢜ ꢤ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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