Datasheet > TL16C750PMG4

TL16C750PMG4

更新时间： 2024-11-22 15:54:27

品牌	Logo	应用领域
德州仪器 - TI		通信时钟数据传输外围集成电路
页数	文件大小	规格书
35页	509K
描述
1 CHANNEL(S), 1Mbps, SERIAL COMM CONTROLLER, PQFP64, GREEN, LQFP-64

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TL16C750PMG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP, QFP64,.47SQ,20	针数：	64
Reach Compliance Code：	unknown	HTS代码：	8542.31.00.01
风险等级：	5.66	其他特性：	ALSO OPERATES AT 3.3V MINIMUM SUPPLY AT 14MHZ
地址总线宽度：	3	边界扫描：	NO
最大时钟频率：	16 MHz	通信协议：	ASYNC, BIT
最大数据传输速率：	0.125 MBps	外部数据总线宽度：	8
JESD-30 代码：	S-PQFP-G64	JESD-609代码：	e4
长度：	10 mm	低功率模式：	YES
湿度敏感等级：	3	串行 I/O 数：	1
端子数量：	64	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP64,.47SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	3.3/5 V
认证状态：	Not Qualified	座面最大高度：	1.6 mm
子类别：	Serial IO/Communication Controllers	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	10 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：	1

TL16C750PMG4 数据手册

TL16C750

ASYNCHRONOUS COMMUNICATIONS ELEMENT

WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL

SLLS191C – JANUARY 1995 – REVISED DECEMBER 1997

Pin-to-Pin Compatible With the Existing

TL16C550B/C

Low-Power Mode

Programmable 16- or 64-Byte FIFOs to

Reduce CPU Interrupts

Independent Receiver Clock Input

Independently Controlled Transmit,

Receive, Line Status, and Data Set

Interrupts

Programmable Auto-RTS and Auto-CTS

In Auto-CTS Mode, CTS Controls

Transmitter

Fully Programmable Serial Interface

Characteristics:

– 5-, 6-, 7-, or 8-Bit Characters

– Even-, Odd-, or No-Parity Bit Generation

and Detection

– 1-, 1 1/2-, or 2-Stop Bit Generation

– Baud Generation (DC to 1 Mbits Per

Second)

In Auto-RTS Mode, Receiver FIFO Contents

and Threshold Control RTS

Serial and Modem Control Outputs Drive a

RJ11 Cable Directly When Equipment Is on

the Same Power Drop

Capable of Running With All Existing

TL16C450 Software

False Start Bit Detection

After Reset, All Registers Are Identical to

the TL16C450 Register Set

Complete Status Reporting Capabilities

3-State Output CMOS Drive Capabilities for

Bidirectional Data Bus and Control Bus

Up to 16-MHz Clock Rate for Up to 1-Mbaud

Operation

Line Break Generation and Detection

In the TL16C450 Mode, Hold and Shift

Registers Eliminate the Need for Precise

Synchronization Between the CPU and

Serial Data

Internal Diagnostic Capabilities:

– Loopback Controls for Communications

Link Fault Isolation

– Break, Parity, Overrun, Framing Error

Simulation

Programmable Baud Rate Generator Allows

Division of Any Input Reference Clock by 1

to (2 –1) and Generates an Internal 16 ×

Fully Prioritized Interrupt System Controls

Clock

Modem Control Functions (CTS, RTS, DSR,

DTR, RI, and DCD)

Standard Asynchronous Communication

Bits (Start, Stop, and Parity) Added or

Deleted to or From the Serial Data Stream

Available in 44-Pin PLCC and 64-Pin SQFP

Industrial Temperature Range Available for

64-Pin SQFP

5-V and 3-V Operation

description

The TL16C750 is a functional upgrade of the TL16C550C asynchronous communications element (ACE),

which in turn is a functional upgrade of the TL16C450. Functionally equivalent to the TL16C450 on power up

(character or TL16C450 mode), the TL16C750, like the TL16C550C, can be placed in an alternate mode (FIFO

mode). This relieves the CPU of excessive software overhead by buffering received and transmitted characters.

The receiver and transmitter FIFOs store up to 64 bytes including three additional bits of error status per byte

for the receiver FIFO. The user can choose between a 16-byte FIFO mode or an extended 64-byte FIFO mode.

In the FIFO mode, there is a selectable autoflow control feature that can significantly reduce software overload

and increase system efficiency by automatically controlling serial data flow through the RTS output and the CTS

input signals (see Figure 1).

The TL16C750 performs serial-to-parallel conversion on data received from a peripheral device or modem and

parallel-to-serial conversion on data received from its CPU. The CPU can read the ACE status at any time. The

ACE includes complete modem control capability and a processor interrupt system that can be tailored to

minimize software management of the communications link.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...35

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与TL16C750PMG4相关器件

型号	品牌	获取价格	描述	数据表
TL16C750PT	TI	获取价格	1 CHANNEL(S), 1Mbps, SERIAL COMM CONTROLLER, PQFP64, TQFP-64
TL16C750Y	TI	获取价格	ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL
TL16C752	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752B	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752B-EP	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BLPTREP	TI	获取价格	3.3 V DUAL UART WITH 64-BYTE FIFO
TL16C752BPT	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BPTG4	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BPTR	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BPTRG4	TI	获取价格	3.3-V DUAL UART WITH 64-BYTE FIFO

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