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TL16C752BPTRG4 PDF预览

TL16C752BPTRG4

更新时间: 2024-11-22 03:59:35
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输时钟
页数 文件大小 规格书
36页 503K
描述
3.3-V DUAL UART WITH 64-BYTE FIFO

TL16C752BPTRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP, QFP48,.35SQ,20针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
地址总线宽度:3边界扫描:NO
最大时钟频率:48 MHz通信协议:ASYNC, BIT
最大数据传输速率:0.375 MBps外部数据总线宽度:8
JESD-30 代码:S-PQFP-G48JESD-609代码:e4
长度:7 mm低功率模式:YES
湿度敏感等级:3串行 I/O 数:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP48,.35SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Serial IO/Communication Controllers最大供电电压:3.6 V
最小供电电压:2.7 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

TL16C752BPTRG4 数据手册

 浏览型号TL16C752BPTRG4的Datasheet PDF文件第2页浏览型号TL16C752BPTRG4的Datasheet PDF文件第3页浏览型号TL16C752BPTRG4的Datasheet PDF文件第4页浏览型号TL16C752BPTRG4的Datasheet PDF文件第5页浏览型号TL16C752BPTRG4的Datasheet PDF文件第6页浏览型号TL16C752BPTRG4的Datasheet PDF文件第7页 
TL16C752B  
3.3-V DUAL UART WITH 64-BYTE FIFO  
SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000  
Pin Compatible With ST16C2550 With  
Additional Enhancements  
Supports 3.3-V Operation  
Software Selectable Baud Rate Generator  
Up to 1.5 Mbps Baud Rate When Using  
Crystal (24 MHz Input Clock)  
Prescaler Provides Additional Divide By 4  
Function  
Up to 3 Mbps Baud Rate When Using  
Oscillator or Clock Source (48 MHz Input  
Clock)  
Fast Access Time 2 Clock Cycle IOR/IOW  
Pulse Width  
Programmable Sleep Mode  
64-Byte Transmit FIFO  
Programmable Serial Interface  
Characteristics  
64-Byte Receive FIFO With Error Flags  
Programmable and Selectable Transmit and  
Receive FIFO Trigger Levels for DMA and  
Interrupt Generation  
– 5, 6, 7, or 8 Bit Characters  
– Even, Odd, or No Parity Bit Generation  
and Detection  
– 1, 1.5, or 2 Stop Bit Generation  
Programmable Receive FIFO Trigger Levels  
for Software/Hardware Flow Control  
False Start Bit Detection  
Software/Hardware Flow Control  
– Programmable Xon/Xoff Characters  
– Programmable Auto-RTS and Auto-CTS  
Complete Status Reporting Capabilities in  
Both Normal and Sleep Mode  
Line Break Generation and Detection  
Internal Test and Loopback Capabilities  
Fully Prioritized Interrupt System Controls  
Optional Data Flow Resume by Xon Any  
Character  
DMA Signalling Capability for Both  
Received and Transmitted Data  
Modem Control Functions (CTS, RTS, DSR,  
DTR, RI, and CD)  
PACKAGE  
(TOP VIEW)  
48 47 46 45 44 43 42 41 40 39 38 37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
RESET  
DTRB  
DTRA  
RTSA  
OPA  
RXRDYA  
INTA  
INTB  
A0  
D5  
D6  
D7  
RXB  
RXA  
1
2
3
4
5
6
7
8
9
TXRDYB  
TXA  
TXB  
OPB  
A1  
A2  
NC  
CSA 10  
CSB  
NC  
11  
12  
13 14 15 16 17 18 19 20 21 22 23 24  
NC – No internal connection  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TL16C752BPTRG4 替代型号

型号 品牌 替代类型 描述 数据表
TL16C752BPT TI

完全替代

3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BPTG4 TI

完全替代

3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BPTR TI

类似代替

3.3-V DUAL UART WITH 64-BYTE FIFO

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