TL16C752C
www.ti.com .................................................................................................................................................... SLLS646A –MARCH 2008–REVISED AUGUST 2009
DUAL UART WITH 64-BYTE FIFO
Check for Samples: TL16C752C
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FEATURES
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ST16C654/654D Pin Compatible With
Additional Enhancements (PFB Package Only)
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RS-485 Mode Support
Support 1.8-V, 2.5-V, 3.3-V, or 5-V Supply
Supports up to 24-MHz Crystal Input Clock
(1.5 Mbps)
Characterized for Operation From –40°C to
85°C, Available in Commercial and Industrial
Temperature Grades
Supports up to 48-MHz Oscillator Input Clock
(3 Mbps) for 5-V Operation
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Software-Selectable Baud-Rate Generator
Supports up to 32-MHz Oscillator Input Clock
(2 Mbps) for 3.3-V Operation
Prescalable Provides Additional Divide-by-4
Function
Supports up to 24-MHz Input Clock (1.5 Mbps)
for 2.5-V Operation
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Programmable Sleep Mode
Programmable Serial Interface Characteristics
Supports up to 16-MHz Input Clock (1 Mbps)
for 1.8-V Operation
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5-, 6-, 7-, or 8-Bit Characters
Even, Odd, or No Parity Bit Generation and
Detection
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64-Byte Transmit FIFO
64-Byte Receive FIFO With Error Flags
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1-, 1.5-, or 2-Stop Bit Generation
Programmable and Selectable Transmit and
Receive FIFO Trigger Levels for DMA and
Interrupt Generation
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False Start Bit Detection
Complete Status Reporting Capabilities in
Both Normal and Sleep Mode
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Programmable Receive FIFO Trigger Levels for
Software/Hardware Flow Control
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Line Break Generation and Detection
Internal Test and Loopback Capabilities
Fully Prioritized Interrupt System Controls
Software/Hardware Flow Control
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Programmable Xon/Xoff Characters
Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and CD)
Programmable Auto-RTS and Auto-CTS
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Optional Data Flow Resume by Xon Any
Character
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IrDA Capability
DMA Signaling Capability for Both Received
and Transmitted Data on PN Package
DESCRIPTION
The TL16C752C is a dual universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic
hardware/software flow control, and data rates up to 3 Mbps. It incorporates the functionality of four UARTs, each
UART having its own register set and FIFOs. The four UARTs share only the data bus interface and clock
source, otherwise they operate independently. Another name for the UART function is asynchronous
communications element (ACE), and these terms are used interchangeably. The bulk of this document describes
the behavior of each ACE, with the understanding that four such devices are incorporated into the TL16C752C.
The TL16C752C offers enhanced features. It has a transmission control register (TCR) that stores received FIFO
threshold level to start/stop transmission during hardware and software flow control. With the FIFO RDY register,
the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide
the user with error indications, operational status, and modem interface control. System interrupts may be
tailored to meet user requirements. An internal loopback capability allows onboard diagnostics.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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