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TC9496AF

更新时间: 2024-11-29 08:52:43
品牌 Logo 应用领域
东芝 - TOSHIBA 数字信号处理器
页数 文件大小 规格书
48页 461K
描述
1 Chip Audio Digital Signal Processor

TC9496AF 技术参数

生命周期:Active零件包装代码:QFP
包装说明:QFP, QFP100,.7X.9针数:100
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
长度:20 mm功能数量:1
端子数量:100最高工作温度:75 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP100,.7X.9
封装形状:RECTANGULAR封装形式:FLATPACK
电源:5 V认证状态:Not Qualified
座面最大高度:3.05 mm子类别:Other Consumer ICs
最大压摆率:165 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
宽度:14 mm

TC9496AF 数据手册

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TC9496AF  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC9496AF  
1 Chip Audio Digital Signal Processor  
TC9496AF is the 1 chip audio DSP which built in 24-bits, a  
22.5 MIPS DSP core, 3 ch AD converter, 5 ch DA converter, and  
electronic volume for trims, and corresponds to a Multi-speaker  
system.  
It is possible to realize many application, such as sound field  
control-hall simulation, for example-, digital filter for equalizers,  
dynamic range control, KARAOKE and something.  
Features  
·
Incorporates 3 ch AD converter, 2 ch is 1 bit Σ-type AD  
converter for HiFi-Audio and 1 ch is 16 bit Multi-bit type AD  
converter for Microphone.  
Weight: 1.57 g (typ.)  
2 ch HiFi-ADC (1 bitΣ-type) S/N: 96dB (typ.)  
1 ch Mic. ADC (16 bit Multi-bit type) S/N: 80dB (typ.)  
·
Incorporates 1 bitΣ-type DA converter, and the attenuator for trims is built in each DAC output. In case of the  
use which does not use a trim, It is possible to output the analog signal of DAC directly.  
5 ch DAC (1 bitΣ-type) S/N: 96dB (typ.)  
Attenuator for trim 0dB to 24dB (1dB step)  
Each port has a digital input/output.  
·
·
A built-in self-boot function automatically sets the coefficients and register values at initialization.  
Moreover, four kinds of boot data can be chosen by pin setup.  
Boot ROM: 1024 word × 18 bit  
The DSP block specification are as follows:  
Data bus: 24 bit  
·
Multiplier/adder: 24 bit × 16 bit + 43 bit 43 bit  
Accumulator: 43 bit (sign extension: 4 bit)  
Program ROM: 2048 word × 32 bit  
Coefficient RAM: 448 word × 16 bit  
Coefficient ROM: 256 word × 16 bit  
Offset RAM: 64 word × 16 bit  
Data RAM: 256 word × 24 bit  
Operation speed: 44 ns (510-step (approx.) operation per cycle at fs = 44.1 kHz)  
Interface buffer RAM: 32 word × 16 bit  
Incorporates data delay RAM of 64 kbit.  
·
Delay RAM: 4096 word × 16 bit (64 kbit)  
·
·
·
The microcontroller interface can be selected between TOSHIBA original 3 line type and I2C bus format.  
CMOS silicon structure supports high speed.  
The package is a 100-pin flat package.  
1
2002-01-11  

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