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TC74LVX125F_07 PDF预览

TC74LVX125F_07

更新时间: 2024-09-14 04:49:35
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
8页 237K
描述
Quad Bus Buffer

TC74LVX125F_07 数据手册

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TC74LVX125F/FN/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74LVX125F,TC74LVX125FN,TC74LVX125FT  
Quad Bus Buffer  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74LVX125F/ FN/ FT is a high-speed CMOS quad bus  
buffer fabricated with silicon gate CMOS technology. Designed  
TC74LVX125F  
for use in 3-V systems, it achieves high-speed operation while  
maintaining the CMOS low power dissipation. This device is  
suitable for low-voltage and battery operated systems.  
This device requires the 3-state control input G to be set high  
to place the output into the high-impedance.  
An input protection circuit ensures that 0 to 5.5V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5V to 3V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
TC74LVX125FN  
Features  
High-speed: t = 4.4 ns (typ.) (V  
= 3.3 V)  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) (Ta = 25°C)  
CC  
Input voltage level: V = 0.8 V (max) (V  
= 3 V)  
= 3 V)  
IL  
CC  
CC  
V
IH  
= 2.0 V (min) (V  
Power-down protection is provided on all inputs  
TC74LVX125FT  
Balanced propagation delays: t  
t
pHL  
pLH  
Low noise: V  
= 0.5 V (max)  
OLP  
Pin and function compatible with 74HC125  
Weight  
SOP14-P-300-1.27A  
SOL14-P-150-1.27  
TSSOP14-P-0044-0.65A  
: 0.18 g (typ.)  
: 0.12 g (typ.)  
: 0.06 g (typ.)  
1
2007-10-17  

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