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TC74LVX125FTELM PDF预览

TC74LVX125FTELM

更新时间: 2024-11-10 01:23:47
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
7页 190K
描述
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74LVX125FTELM 数据手册

 浏览型号TC74LVX125FTELM的Datasheet PDF文件第2页浏览型号TC74LVX125FTELM的Datasheet PDF文件第3页浏览型号TC74LVX125FTELM的Datasheet PDF文件第4页浏览型号TC74LVX125FTELM的Datasheet PDF文件第5页浏览型号TC74LVX125FTELM的Datasheet PDF文件第6页浏览型号TC74LVX125FTELM的Datasheet PDF文件第7页 
TC74LVX125F/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74LVX125F,TC74LVX125FT  
Quad Bus Buffer  
The TC74LVX125F/ FT is a high-speed CMOS quad bus buffer  
fabricated with silicon gate CMOS technology. Designed for use  
in 3-V systems, it achieves high-speed operation while  
maintaining the CMOS low power dissipation. This device is  
suitable for low-voltage and battery operated systems.  
This device requires the 3-state control input G to be set high  
to place the output into the high-impedance.  
TC74LVX125F  
An input protection circuit ensures that 0 to 5.5V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5V to 3V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
TC74LVX125FT  
Features  
High-speed: t = 4.4 ns (typ.) (V  
= 3.3 V)  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) (Ta = 25°C)  
CC  
Input voltage level: V = 0.8 V (max) (V  
= 3 V)  
= 3 V)  
IL  
CC  
CC  
V
IH  
= 2.0 V (min) (V  
Power-down protection is provided on all inputs  
Weight  
SOP14-P-300-1.27A  
TSSOP14-P-0044-0.65A  
Balanced propagation delays: t  
t
pHL  
pLH  
: 0.18 g (typ.)  
: 0.06 g (typ.)  
Low noise: V  
= 0.5 V (max)  
OLP  
Pin and function compatible with 74HC125  
1
2012-02-29  

TC74LVX125FTELM 替代型号

型号 品牌 替代类型 描述 数据表
MC74LVX125DTR2G ONSEMI

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Quad Bus Buffer
74LVX125MTCX FAIRCHILD

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Low Voltage Quad Buffer with 3-STATE Outputs
74LVX125MTC FAIRCHILD

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Low Voltage Quad Buffer with 3-STATE Outputs

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