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TC55VZM208ATGN12 PDF预览

TC55VZM208ATGN12

更新时间: 2024-11-08 19:15:03
品牌 Logo 应用领域
东芝 - TOSHIBA 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 161K
描述
IC 512K X 8 CACHE SRAM, 12 ns, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44, Static RAM

TC55VZM208ATGN12 技术参数

生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2, TSOP44,.46,32针数:44
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.84
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44长度:18.41 mm
内存密度:4194304 bit内存集成电路类型:CACHE SRAM
内存宽度:8功能数量:1
端子数量:44字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.004 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.07 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

TC55VZM208ATGN12 数据手册

 浏览型号TC55VZM208ATGN12的Datasheet PDF文件第2页浏览型号TC55VZM208ATGN12的Datasheet PDF文件第3页浏览型号TC55VZM208ATGN12的Datasheet PDF文件第4页浏览型号TC55VZM208ATGN12的Datasheet PDF文件第5页浏览型号TC55VZM208ATGN12的Datasheet PDF文件第6页浏览型号TC55VZM208ATGN12的Datasheet PDF文件第7页 
TC55VZM208AJGN/ATGN08,10,12  
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS  
524,288-WORD BY 8-BIT CMOS STATIC RAM  
DESCRIPTION  
The TC55VZM208AJGN/ATGN is a 4,194,304-bit high-speed static random access memory (SRAM) organized as  
524,288 words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed,  
it operates from a single 3.3 V power supply. Chip enable (CE ) can be used to place the device in a low-power mode,  
and output enable ( OE ) provides fast memory access. This device is well suited to cache memory applications  
where high-speed access and high-speed storage are required. All inputs and outputs are directly LVTTL  
compatible. The TC55VZM208AJGN/ATGN is available in plastic 36-pin SOJ and 44-pin TSOP with 400mil width  
for high density surface assembly.  
FEATURES  
Single power supply voltage of 3.3 V 0.3 V  
Fully static operation  
Fast access time (the following are maximum values)  
TC55VZM208AJGN/ATGN08:8 ns  
TC55VZM208AJGN/ATGN10:10 ns  
TC55VZM208AJGN/ATGN12:12 ns  
Low-power dissipation  
All inputs and outputs are LVTTL compatible  
Output buffer control using OE  
Package:  
SOJ36-P-400-1.27 (AJGN)  
(Weight: 1.35 g typ)  
(the following are maximum values)  
TSOP II44-P-400-0.80 (ATGN) (Weight: 0.45 g typ)  
Cycle Time  
8
10  
12  
ns  
Operation (max) 100  
80  
70  
mA  
Standby:4 mA (both devices)  
PIN ASSIGNMENT (TOP VIEW)  
36 PIN SOJ 44 PIN TSOP  
PIN NAMES  
A0 to A18  
Address Inputs  
NC  
NC  
A17  
A3  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
NC  
NC  
NC  
A4  
A5  
A6  
A7  
OE  
2
I/O1 to I/O8 Data Inputs/Outputs  
3
4
CE  
WE  
OE  
Chip Enable Input  
Write Enable Input  
Output Enable Input  
Power (+3.3 V)  
Ground  
A17  
1
2
3
4
5
6
7
8
9
36 NC  
35 A4  
34 A5  
33 A6  
32 A7  
A2  
5
A3  
A2  
A1  
A0  
A1  
A0  
6
7
8
CE  
I/O1  
9
I/O8  
I/O7  
GND  
VDD  
I/O6  
I/O5  
A8  
31  
I/O2  
VDD  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
CE  
I/O1  
I/O2  
VDD  
GND 10  
I/O3 11  
I/O4 12  
OE  
30 I/O8  
29 I/O7  
28 GND  
27 VDD  
26 I/O6  
25 I/O5  
24 A8  
V
DD  
GND  
I/O3  
I/O4  
GND  
NC  
WE  
A16  
A15  
A14  
A13  
A18  
NC  
No Connection  
Not Usable (Input)  
A9  
13  
A10  
A11  
A12  
NU  
WE  
NU  
A16 14  
A15 15  
A14 16  
A13 17  
A18 18  
23 A9  
22 A10  
21 A11  
20 A12  
19 NU  
NC  
NC  
NC  
(TC55VZM208AJGN)  
(TC55VZM208ATGN)  
2002-02-05 1/10  

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