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SY100H842ZHTR PDF预览

SY100H842ZHTR

更新时间: 2024-11-24 04:50:11
品牌 Logo 应用领域
麦瑞 - MICREL 输出元件
页数 文件大小 规格书
7页 68K
描述
SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE

SY100H842ZHTR 数据手册

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®
PrecisionEdge
SY10H842  
SINGLE SUPPLY QUAD  
PECL-TO-TTL OUTPUT ENABLE  
SY100H842  
FEATURES  
Translates positive ECL-to-TTL (PECL-to-TTL)  
300ps pin-to-pin skew  
®
Precision Edge  
500ps part-to-part skew  
DESCRIPTION  
Differential internal design for increased noise  
immunity and stable threshold inputs  
The SY10/100H842 are single supply, low skew  
translating 1:4 clock drivers.  
VBB reference output  
Single supply  
The devices feature a 24mA TTL output stage, with  
AC performance specified into a 50pF load capacitance.  
A HIGH on the enable pin (EN) forces all outputs LOW.  
As frequencies increase to 40MHz and above, precise  
timing and shaping of clock signals becomes extremely  
important. The H842 solves several clock distribution  
problems such as minimizing skew 300ps), maximizing  
clock fanout (24mA drive), and precise duty cycle control  
through a proprietary differential internal design.  
Enable input  
Extra TTL and ECL power/ground pins to reduce  
cross-talk/noise  
High drive capability: 24mA each output  
Fully compatible with industry standard 10K, 100K  
I/O levels  
Available in 16-pin SOIC package  
The 10K version is compatible with 10KH ECL logic  
levels. The 100K version is compatible with 100K levels.  
BLOCK DIAGRAM  
PIN NAMES  
Pin  
Function  
TTL Ground (0V)  
TTL Outputs  
GT  
VT  
TTL VCC (+5.0V)  
Q
Q
Q
Q
0
1
2
3
VE  
ECL VCC (+5.0V)  
GE  
ECL Ground (0V)  
D, D  
VBB  
Q0 - Q3  
EN  
Signal Input (PECL)  
VBB Reference Output (PECL)  
Signal Outputs (TTL)  
Enable Input (PECL)  
ECL Input  
D
D
VBB  
EN  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: F  
Amendment:/0  
M9999-032906  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

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