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STV1601A PDF预览

STV1601A

更新时间: 2024-11-14 22:42:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 编码器
页数 文件大小 规格书
17页 246K
描述
SERIAL INTERFACE TRANSMISSION ENCODER

STV1601A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:PGA包装说明:PGA,
针数:37Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.83
地址总线宽度:边界扫描:NO
通信协议:SYNC, BYTE数据编码/解码方法:NRZI
最大数据传输速率:33.75 MBps外部数据总线宽度:10
JESD-30 代码:R-CPGA-P37长度:25.65 mm
低功率模式:NO串行 I/O 数:1
端子数量:37最高工作温度:65 °C
最低工作温度:封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:PGA封装形状:RECTANGULAR
封装形式:GRID ARRAY认证状态:Not Qualified
座面最大高度:5.1 mm最大供电电压:5.2 V
最小供电电压:4.8 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:PIN/PEG
端子节距:2.54 mm端子位置:PERPENDICULAR
宽度:25.29 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

STV1601A 数据手册

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STV1601A  
SERIAL INTERFACE TRANSMISSION ENCODER  
THISICCONTAINS ALLTHECIRCUITSNEEDED  
CODE LIMITATION  
FOR CONVERSION FROM PARALLEL DATA,  
AND PARALLEL CLOCK, INTO SERIAL DATA.  
APPLICATIONS ARE STRAIGHTFORWARD AS  
ONLY A FEW EXTERNAL COMPONENTS ARE  
NEEDED.  
The word composing the Sync word listed above  
shall not appear during data words.  
This limitation includes 00 and FF in 8-bit use and  
000 through 003 and 3FC through 3FF in 10-bit  
use.  
OTHER RELATED IC’s INCLUDE :  
.
STV1602A, A SERIAL TRANSMISSION DE-  
CODER (WITH A BUILT-IN CABLE EQUAL-  
DESCRIPTION  
TheSTV1601Ais aHybrid IC encoderthatconverts  
parallel data into serial data for a serial transmis-  
sion line.  
IZER  
AND  
PARALLEL-TO-SERIAL  
CONVERSION)  
STV1389AQ COAXIAL CABLE DRIVER  
.
STRUCTURE  
.
Hybrid IC  
APPLICATIONS  
PGA37  
(Ceramic Package)  
SERIAL DATA TRANSMISSION ENCODER  
.
100 to 270 Mb/s  
ORDER CODE : STV1601A  
APPLICATIONS EXAMPLES  
.
Serial data transmission of digital television  
signal 525-625 lines  
4:2:2 component 270Mb/s (10-BIT)  
4*FSC PAL composite 177Mb/s (10-BIT)  
.
PIN CONNECTIONS  
.
.
4*FSC NTSC composite 143Mb/s (10-BIT)  
27 26 25 24 23 22 21 20 19  
FUNCTIONS  
28  
18  
17  
16  
15  
14  
13  
12  
11  
10  
D3X  
D4Y  
D4X  
D5Y  
D5X  
D6Y  
D6X  
D7Y  
D7X  
RSE  
VCC  
.
Parallel-to-serial conversion  
29  
.
Scrambler : Modulo - 2 division by  
G(x) = (x9 + x4 + 1) (x + 1)  
PCX  
PCY  
GND  
FV  
30  
.
31  
PLL for serial clock generation  
PLL lock detection  
Sync word required with the parallel data  
stream  
.
32  
.
33  
TRP  
TN1  
PCK  
34  
8 bit  
FFH  
00H  
00H  
10 bit  
3FFH  
000H  
000H  
35  
1st word  
2nd word  
3rd word  
36 37 NC  
1
2
3
4
5
6
7
8
9
Sync word conversion(8-bit timing referencesignal  
is internally converted to 10-bit).  
1/17  
November 1992  

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