Datasheet > STGAP2GSN

STGAP2GSN

更新时间： 2023-12-20 18:46:36

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
20页	551K
描述
Galvanically isolated 3 A single gate driver for Enhancement mode GaN FETs

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STGAP2GSN 数据手册

STGAP2GSN

Electrical

characteristics

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Standby VDD quiescent

supply current

VDD

Standby mode

µA

QDDSBY

Logic inputs

Low-level logic threshold

voltage

IN+, IN-

0.29·VDD 0.33·VDD 0.37·VDD

0.58·VDD 0.66·VDD 0.70·VDD

High-level logic threshold

voltage

INx logic “1” input bias

current

INx = 5 V

µA

INh

INx logic “0” input bias

current

IN+, IN-

INx = GND

µA

kΩ

INl

Inputs pull-down resistors INx = 5 V

100

150

Driver buffer section

T = 25 °C

Source short-circuit

current

GON

T = -40 ÷ +125 °C ⁽¹⁾

1.5

2.5

1.5

Source output high-level

voltage

= 100 mA

GON

VH-0.15

VH-0.12

GONH

GON

Source R

1.25

DS_ON

T = 25 °C

GOFF

Sink short-circuit current

GOFF

T = -40 ÷ +125 °C ⁽¹⁾

2.25

3.75

Sink output low-level

voltage

= 100 mA

GOFF

GOFFL

GOFF

Sink R

0.6

0.8

GOFF

DS_ON

Overtemperature protection

Shutdown temperature ⁽¹⁾

Temperature hysteresis ⁽¹⁾

170

°C

hys

Standby

Standby time

Wake-up time

Wake-up delay

Standby filter

See Section 6.6

200

280

500

µs

STBY

WUP

awake

200

280

800

stbyfilt

1. Characterization data, not tested in production

DS14151 - Rev 1

page 6/20

1...3 4 567 8 9...20

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