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STG3693QTR PDF预览

STG3693QTR

更新时间: 2024-11-29 02:59:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 开关光电二极管
页数 文件大小 规格书
17页 310K
描述
Low voltage high bandwidth Quad SPDT switch

STG3693QTR 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFN包装说明:VQCCN, LCC16,.07X.1,16
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:8 weeks风险等级:1.74
模拟集成电路 - 其他类型:SPDTJESD-30 代码:S-XQCC-N16
JESD-609代码:e4长度:2.6 mm
湿度敏感等级:1信道数量:1
功能数量:1端子数量:16
标称断态隔离度:79 dB通态电阻匹配规范:0.3 Ω
最大通态电阻 (Ron):6.5 Ω最高工作温度:125 °C
最低工作温度:-55 °C输出:SEPARATE OUTPUT
封装主体材料:UNSPECIFIED封装代码:VQCCN
封装等效代码:LCC16,.07X.1,16封装形状:RECTANGULAR
封装形式:CHIP CARRIER, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:1.6/4 V认证状态:Not Qualified
座面最大高度:0.55 mm子类别:Multiplexer or Switches
最大供电电压 (Vsup):4.3 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3 V表面贴装:YES
最长断开时间:6 ns最长接通时间:26 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:1.8 mmBase Number Matches:1

STG3693QTR 数据手册

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STG3693  
Low voltage high bandwidth Quad SPDT switch  
Features  
Ultra low power dissipation:  
– I = 0.2µA (Max.) at T = 85°C  
CC  
A
Low “ON” resistance:  
– R = 4(T = 25°C) at V = 3.0V  
ON  
A
CC  
Wide operating voltage range:  
QFN16L (2.6mm x 1.8mm)  
– V (Opr) = 1.65V to 4.3V single supply  
CC  
4.3V tolerant and 1.8V compatible threshold on  
digital control input at V = 2.3V to 3.0V  
CC  
Description  
Typical bandwidth (-3dB) at 800MHz on all  
channels  
The STG3693 is a high-speed CMOS low voltage  
quad analog S.P.D.T. (Single Pole Dual Throw)  
Switch or 2:1 Multiplexer /Demultiplexer Switch  
fabricated in silicon gate C2MOS technology. It is  
designed to operate from 1.65V to 4.3V, making  
this device ideal for portable applications.  
Latch-up performance exceeds 100mA per  
JESD 78, Class II  
ESD performance exceeds JESD22  
– 2000-V Human body model (A114-A)  
USB (2.0) high speed (480Mbps) signal  
The nSEL inputs are provided to control the  
switch. The switch S1 is ON (they are connected  
switching compliant  
to common  
Ports Dn) when the nSEL input is  
held high and OFF (high impedance state exists  
between the two ports) when SEL is held low; the  
switch S2 is ON (it is connected to common Port  
D) when the nSEL input is held low and OFF (high  
impedance state exists between the two ports)  
when nSEL is held high.  
Additional key features are fast switching speed,  
Break Before Make Delay Time and Ultra Low  
Power Consumption. All inputs and outputs are  
equipped with protection circuits against static  
discharge, giving them ESD immunity and  
transient excess voltage.  
Order codes  
Part number  
Package  
QFN16L (2.6mm x 1.8mm)  
Packaging  
STG3693QTR  
Tape and reel  
January 2007  
Rev 1  
1/17  
www.st.com  
17  

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