NTD110N02R
Power MOSFET
24 V, 110 A, N−Channel DPAK
Features
• Planar HD3e Process for Fast Switching Performance
• Low R
to Minimize Conduction Loss
DS(on)
http://onsemi.com
• Low C to Minimize Driver Loss
iss
• Low Gate Charge
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
• Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
24 V
4.1 mW @ 10 V
110 A
• Pb−Free Packages are Available
N−Channel
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
V
24
V
V
DSS
G
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ T = 25°C
V
±20
GS
R
P
1.35
110
°C/W
W
q
JC
S
C
D
Drain Current
4
− Continuous @ T = 25°C, Chip
I
I
110
110
A
A
C
D
− Continuous @ T = 25°C,
C
D
D
D
Limited by Package
4
− Continuous @ T = 25°C,
I
I
32
A
A
A
Limited by Wires
1
2
1
− Single Pulse (t = 10 ms)
110
p
2
3
3
Thermal Resistance
− Junction−to−Ambient (Note 1)
R
P
I
52
2.88
17.5
°C/W
W
A
CASE 369D
DPAK
(Straight Lead)
STYLE 2
CASE 369AA
DPAK
(Surface Mount)
STYLE 2
q
JA
− Total Power Dissipation @ T = 25°C
A
D
− Drain Current − Continuous @ T = 25°C
A
D
Thermal Resistance
− Junction−to−Ambient (Note 2)
R
P
100
1.5
°C/W
W
q
JA
− Total Power Dissipation @ T = 25°C
MARKING DIAGRAM
& PIN ASSIGNMENTS
A
D
− Drain Current − Continuous @ T = 25°C
I
D
12.5
A
A
Operating and Storage
Temperature Range
T , T
−55 to
175
°C
J
stg
4
4
Drain
Drain
Single Pulse Drain−to−Source Avalanche
E
AS
120
mJ
Energy − Starting T = 25°C
J
(V = 50 Vdc, V = 10 Vdc,
DD
GS
I = 15.5 Apk, L = 1.0 mH, R = 25 W)
L
G
Maximum Lead Temperature for Soldering
T
L
260
°C
Purposes, (1/8″ from case for 10 s)
2
1
Gate
3
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Drain
Source
1
2
3
Gate Drain Source
Y
= Year
= Work Week
T110N2 = Device Code
1. When surface mounted to an FR4 board using 0.5 sq in drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
WW
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
December, 2004 − Rev. 6
NTD110N02R/D