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SST27SF256-70-3C-WG

更新时间： 2024-10-31 22:19:55
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页数 文件大小 规格书
26页 268K
描述
256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash

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SST27SF256-70-3C-WG 数据手册

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256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit (x8)  
Many-Time Programmable Flash  
SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020  
SST27SF256 / 512 / 010 / 0205.0V-Read 256Kb / 512Kb / 1Mb / 2Mb (x8) MTP flash memories  
Data Sheet  
FEATURES:  
•
•
•
Organized as 32K x8 / 64K x8 / 128K x8 / 256K x8  
4.5-5.5V Read Operation  
•
Fast Byte-Program Operation  
– Byte-Program Time: 20 µs (typical)  
– Chip Program Time:  
Superior Reliability  
0.7 seconds (typical) for SST27SF256  
1.4 seconds (typical) for SST27SF512  
2.8 seconds (typical) for SST27SF010  
5.6 seconds (typical) for SST27SF020  
– Endurance: At least 1000 Cycles  
– Greater than 100 years Data Retention  
•
•
Low Power Consumption  
– Active Current: 20 mA (typical)  
– Standby Current: 10 µA (typical)  
•
Electrical Erase Using Programmer  
– Does not require UV source  
– Chip-Erase Time: 100 ms (typical)  
Fast Read Access Time  
– 70 ns  
– 90 ns  
•
•
•
TTL I/O Compatibility  
JEDEC Standard Byte-wide EPROM Pinouts  
Packages Available  
– 32-pin PLCC  
– 32-pin TSOP (8mm x 14mm)  
– 28-pin PDIP for SST27SF256/512  
– 32-pin PDIP for SST27SF010/020  
PRODUCT DESCRIPTION  
The SST27SF256/512/010/020 are a 32K x8 / 64K x8 /  
128K x8 / 256K x8 CMOS, Many-Time Programmable  
(MTP) low cost flash, manufactured with SST’s proprietary,  
high performance SuperFlash technology. The split-gate  
cell design and thick oxide tunneling injector attain better  
reliability and manufacturability compared with alternate  
approaches. These MTP devices can be electrically erased  
and programmed at least 1000 times using an external pro-  
grammer with a 12 volt power supply. They have to be  
erased prior to programming. These devices conform to  
JEDEC standard pinouts for byte-wide memories.  
Device Operation  
The SST27SF256/512/010/020 are a low cost flash solu-  
tion that can be used to replace existing UV-EPROM, OTP,  
and mask ROM sockets. These devices are functionally  
(read and program) and pin compatible with industry stan-  
dard EPROM products. In addition to EPROM functionality,  
these devices also support electrical erase operation via an  
external programmer. They do not require a UV source to  
erase, and therefore the packages do not have a window.  
Read  
Featuring high performance Byte-Program, the  
SST27SF256/512/010/020 provide a Byte-Program time of  
20 µs. Designed, manufactured, and tested for a wide  
spectrum of applications, these devices are offered with an  
endurance of at least 1000 cycles. Data retention is rated at  
greater than 100 years.  
The Read operation of the SST27SF256/512/010/020 is  
controlled by CE# and OE#. Both CE# and OE# have to be  
low for the system to obtain data from the outputs. Once  
the address is stable, the address access time is equal to  
the delay from CE# to output (TCE). Data is available at the  
output after a delay of TOE from the falling edge of OE#,  
assuming that CE# pin has been low and the addresses  
have been stable for at least TCE - TOE. When the CE# pin  
is high, the chip is deselected and a typical standby current  
of 10 µA is consumed. OE# is the output control and is  
used to gate data from the output pins. The data bus is in  
high impedance state when either CE# or OE# is high.  
The SST27SF256/512/010/020 are suited for applications  
that require infrequent writes and low power nonvolatile  
storage. These devices will improve flexibility, efficiency,  
and performance while matching the low cost in nonvolatile  
applications that currently use UV-EPROMs, OTPs, and  
mask ROMs.  
To meet surface mount and conventional through hole  
requirements, the SST27SF256/512 are offered in 32-pin  
PLCC, 32-pin TSOP, and 28-pin PDIP packages. The  
SST27SF010/020 are offered in 32-pin PDIP, 32-pin PLCC  
and 32-pin TSOP packages. See Figures 1, 2, and 3 for  
pinouts.  
Byte-Program Operation  
The SST27SF256/512/010/020 are programmed by using  
an external programmer. The programming mode for  
SST27SF256/010/020 is activated by asserting 12V (±5%)  
©2001 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
MTP is a trademark of Silicon Storage Technology, Inc.  
S71152-02-000 5/01  
1
502  
These specifications are subject to change without notice.  
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与SST27SF256-70-3C-WG相关器件

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SST27SF256-70-3C-WH SST

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SST27SF256-70-3C-WHE SILICON

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SST27SF256-70-3I-WH SILICON

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 		EEPROM, 32KX8, 70ns, Parallel, CMOS, PDSO32
SST27SF256-90 SST

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 		256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash
SST27SF256-90-3C-NG SST

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SST27SF256-90-3C-NH SST

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SST27SF256-90-3C-NHE SILICON

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 		Flash, 32KX8, 90ns, PQCC32, LEAD FREE, PLASTIC, MO-016AE, LCC-32
SST27SF256-90-3C-PG SST

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 		256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash
SST27SF256-90-3C-PGE SILICON

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 		Flash, 32KX8, 90ns, PDIP28, LEAD FREE, PLASTIC, MO-015AH, DIP-28
SST27SF256-90-3C-PH SST

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 		256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash

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