5秒后页面跳转
捷配首页

Datasheet > 微控制器和处理器 > 其他 uPs/uCs/外围集成电路> SN74LVT8996DW
SN74LVT8996DW PDF预览

SN74LVT8996DW

更新时间： 2024-09-15 22:36:43
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管信息通信管理双倍数据速率
页数 文件大小 规格书
44页 714K
描述
3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS

阅读下载

中文翻译

获取价格

SN74LVT8996DW 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOIC-24针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.3Is Samacsys：N
外部数据总线宽度：JESD-30 代码：R-PDSO-G24
JESD-609代码：e4长度：15.4 mm
湿度敏感等级：1端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Other Microprocessor ICs
最大供电电压：3.6 V最小供电电压：2.7 V
标称供电电压：3 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUITBase Number Matches：1

SN74LVT8996DW 数据手册

 浏览型号SN74LVT8996DW的Datasheet PDF文件第2页浏览型号SN74LVT8996DW的Datasheet PDF文件第3页浏览型号SN74LVT8996DW的Datasheet PDF文件第4页浏览型号SN74LVT8996DW的Datasheet PDF文件第5页浏览型号SN74LVT8996DW的Datasheet PDF文件第6页浏览型号SN74LVT8996DW的Datasheet PDF文件第7页 
SN54LVT8996, SN74LVT8996  
3.3-V 10-BIT ADDRESSABLE SCAN PORTS  
MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS  
SCBS686A – APRIL 1997 – REVISED DECEMBER 1999  
Members of the Texas Instruments (TI )  
Simple Addressing (Shadow) Protocol Is  
Received/Acknowledged on Primary TAP  
Broad Family of Testability Products  
Supporting IEEE Std 1149.1-1990 (JTAG)  
Test Access Port (TAP) and Boundary-Scan  
Architecture  
10-Bit Address Space Provides for up to  
1021 User-Specified Board Addresses  
Bypass (BYP) Pin Forces  
Primary-to-Secondary Connection Without  
Use of Shadow Protocols  
Extend Scan Access From Board Level to  
Higher Levels of System Integration  
Promote Reuse of Lower-Level  
(Chip/Board) Tests in System Environment  
Connect (CON) Pin Provides Indication of  
Primary-to-Secondary Connection  
While Powered at 3.3 V, Both the Primary  
and Secondary TAPs Are Fully 5-V Tolerant  
for Interfacing to 5-V and/or 3.3-V Masters  
and Targets  
High-Drive Outputs (–32-mA I , 64-mA I  
Support Backplane Interface at Primary and  
High Fanout at Secondary  
)
OH  
OL  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Switch-Based Architecture Allows Direct  
Connect of Primary TAP to Secondary TAP  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Primary TAP Is Multidrop for Minimal Use of  
Backplane Wiring Channels  
– 1000-V Charged-Device Model (C101)  
Shadow Protocols Can Occur in Any of  
Test-Logic-Reset, Run-Test/Idle, Pause-DR,  
and Pause-IR TAP States to Provide for  
Board-to-Board Test and Built-In Self-Test  
Package Options Include Plastic  
Small-Outline (DW) and Thin Shrink  
Small-Outline (PW) Packages, Ceramic  
Chip Carriers (FK), and Ceramic DIPs (JT)  
SN54LVT8996 . . . JT PACKAGE  
SN74LVT8996 . . . DW OR PW PACKAGE  
(TOP VIEW)  
SN54LVT8996 . . . FK PACKAGE  
(TOP VIEW)  
A4  
A3  
A2  
A1  
A0  
A5  
A6  
A7  
A8  
A9  
V
CON  
STDI  
STCK  
STMS  
STDO  
STRST  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
4
3
2
1 28 27 26  
25  
2
A1  
A0  
A8  
A9  
V
5
3
24  
23  
22  
6
4
BYP  
NC  
7
CC  
5
NC  
8
BYP  
GND  
PTDO  
PTCK  
PTMS  
PTDI  
PTRST  
6
GND  
PTDO  
21 CON  
9
CC  
7
20  
19  
STDI  
10  
8
PTCK 11  
STCK  
12 13 14 15 16 17 18  
9
10  
11  
12  
NC – No internal connection  
description  
The ’LVT8996 10-bit addressable scan ports (ASP) are members of the Texas Instruments SCOPE testability  
integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate  
testing of complex circuit assemblies. Unlike most SCOPE devices, the ASP is not a boundary-scannable  
device, rather, it applies TI’s addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test  
access port (TAP) to extend scan access beyond the board level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SCOPE and TI are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...44

中文翻译

下载PDF

SN74LVT8996DW 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVT8996DWR TI

完全替代

 3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCE

与SN74LVT8996DW相关器件

型号 品牌 获取价格 描述 数据表
SN74LVT8996DWR TI

获取价格

 		3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCE
SN74LVT8996-EP TI

获取价格

 		3.3-V 10-BIT ADDRESSABLE SCAN PORT MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (KTAG) TAP TRANSC
SN74LVT8996IPWREP TI

获取价格

 		3.3-V 10-BIT ADDRESSABLE SCAN PORT MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (KTAG) TAP TRANSC
SN74LVT8996PW TI

获取价格

 		3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCE
SN74LVT8996PWR TI

获取价格

 		3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCE
SN74LVTH125 TI

获取价格

 		3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS
SN74LVTH125D TI

获取价格

 		3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS
SN74LVTH125DB TI

获取价格

 		3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS
SN74LVTH125DBLE TI

获取价格

 		LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, PLASTIC, SSOP-14
SN74LVTH125DBR TI

获取价格

 		3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS

与SN74LVT8996DW相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证